Special Section on Onboard Compression and Processing for Space Data Systems

Efficient field-programmable gate array implementation of CCSDS 121.0-B-2 lossless data compression algorithm for image compression

[+] Author Affiliations
Nektarios Kranitis, Ioannis Sideris, Antonios Tsigkanos, Georgios Theodorou, Antonios Paschalis

National and Kapodistrian University of Athens, Department of Informatics and Telecommunications, Digital Systems and Computer Architecture Laboratory, Panepistimiopolis, Ilissia, Athens 15784, Greece

Raffaele Vitulli

European Space Agency, Keplerlaan 1, 2201AZ Noordwijk, The Netherlands

J. Appl. Remote Sens. 9(1), 097499 (May 19, 2015). doi:10.1117/1.JRS.9.097499
History: Received January 15, 2015; Accepted April 14, 2015
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Abstract.  The Consultative Committee for Space Data Systems (CCSDS) 121.0-B-2 lossless data compression standard defines a lossless adaptive source coding algorithm which is applicable to a wide range of imaging and nonimaging data. We introduce a field-programmable gate array (FPGA) implementation of CCSDS 121.0-B-2 as an intellectual property (IP) core with the following features: (a) it is enhanced with a two-dimensional (2-D) second-order predictor making it more suitable for image compression, (b) it is enhanced with near-lossless compression functionality, (c) its parallel, pipelined architecture provides high data-rate performance with a maximum achievable throughput of 205Msamples/s (3.2 Gbps at 16 bit) when targeting the Xilinx Virtex-5QV FPGA, and (d) it requires very low FPGA resources. When mission requirements impose lossless image compression, the CCSDS 121.0-B-2 IP core provides a very low implementation cost solution. According to European Space Agency PROBA-3 Bridging Phase, the CCSDS 121.0-B-2 IP core will be implemented in a Microsemi RTAX2000 FPGA, hosted in the data processing unit of the Coronagraph Control Box, of the Association of Spacecraft for Polarimetric and Imaging Investigation of the Corona of the Sun Coronagraph System Payload. To the best of our knowledge, it is the fastest FPGA implementation of CCSDS 121.0-B-2 to date, also including a 2-D second-order predictor making it more suitable for image compression.

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© 2015 Society of Photo-Optical Instrumentation Engineers

Citation

Nektarios Kranitis ; Ioannis Sideris ; Antonios Tsigkanos ; Georgios Theodorou ; Antonios Paschalis, et al.
"Efficient field-programmable gate array implementation of CCSDS 121.0-B-2 lossless data compression algorithm for image compression", J. Appl. Remote Sens. 9(1), 097499 (May 19, 2015). ; http://dx.doi.org/10.1117/1.JRS.9.097499


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