KEYWORDS: Convolution, Digital filtering, Image processing, Image filtering, Image enhancement, Infinite impulse response filters, Digital signal processing, Filtering (signal processing), Very large scale integration, Field programmable gate arrays
In this paper we describe a Hardware Accelerator (HWA) for fast recursive approximation of separable convolution with exponential function. This filter can be used in many Image Processing (IP) applications, e.g. depth-dependent image blur, image enhancement and disparity estimation. We have adopted this filter RTL implementation to provide maximum throughput in constrains of required memory bandwidth and hardware resources to provide a power-efficient VLSI implementation.
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