Parallel processing architectures for image processing systems

Michael Vahey; Robert F. Cody

doi:10.1117/12.204205

25 April 1995 Parallel processing architectures for image processing systems

Michael Vahey, Robert F. Cody

Proceedings Volume 10279, Digital Signal Processing Technology: A Critical Review; 102790E (1995) https://doi.org/10.1117/12.204205
Event: SPIE's 1995 Symposium on OE/Aerospace Sensing and Dual Use Photonics, 1995, Orlando, FL, United States

Abstract

Recent image processing systems are exploiting available high computing throughputs in parallel processing architectures. Algorithms are becoming more adaptive to specific clutter and scene content. Data dependencies are being used for more robust operation. This, in turn, increases the number of compute operations required per pixel or image frame.

This paper describes the relationships between key enablers that meet system performance, density, and program requirements. Specifically, it addresses advances in processing element throughput and parallel processing technology for meeting system timelines and use of COTS technology for meeting program cost and schedule requirements.

Citation Download Citation

Michael Vahey and Robert F. Cody "Parallel processing architectures for image processing systems", Proc. SPIE 10279, Digital Signal Processing Technology: A Critical Review, 102790E (25 April 1995); https://doi.org/10.1117/12.204205

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