Madhulika Korde,1 Subhadeep Kal,2 Cheryl Alix,2 Nick Keller,3 G. Andrew Antonellihttps://orcid.org/0000-0002-8536-2750,4 Aelan Mosden,2 Alain C. Diebold1
1SUNY Polytechnic Institute (United States) 2TEL Technology Ctr., America, LLC (United States) 3Onto Innovation Inc. (United States) 4ONTO Innovation, Inc. (United States)
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.
Here, we report the measurement of the dielectric spacer etch process for nanowire and nanosheet FET processes. A previously described Nanowire Test Structure (NWTS) was used for this study.[1, 2, 3] This structure has alternating Si/Si1-xGex/…/Si multilayers. Subsequent to the selective etching of the Si1-xGex layers (cavity etch), a silicon nitride (SiN) dielectric layer was deposited on the NWTS. Here we report on the use of Mueller Matrix Spectroscopic Ellipsometry based Scatterometry (MMSE) to measure the thickness of the SiN dielectric layer after deposition and after trim etch steps. Four different amounts of trim etch were characterized.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.
The alert did not successfully save. Please try again later.
Madhulika Korde, Subhadeep Kal, Cheryl Alix, Nick Keller, G. Andrew Antonelli, Aelan Mosden, Alain C. Diebold, "Scatterometry of nanowire/nanosheet FETs for advanced technology nodes," Proc. SPIE 11611, Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV, 116111S (22 February 2021); https://doi.org/10.1117/12.2584751