Plasma Assisted Deposition and Device Technology: Interlevel Dielectric Considerations

G. W. Hills; A. S. Harrus; M. J. Thoma

doi:10.1117/12.978050

30 January 1990 Plasma Assisted Deposition and Device Technology: Interlevel Dielectric Considerations

G. W. Hills, A. S. Harrus, M. J. Thoma

Proceedings Volume 1185, Dry Processing for Submicrometer Lithography; (1990) https://doi.org/10.1117/12.978050
Event: 1989 Microelectronic Integrated Processing Conferences, 1989, Santa Clara, United States

Abstract

In this paper we discuss several approaches for obtaining satisfactory coverage of plasma enhanced CVD TEOS, PETEOS, over severe topography in submicron and larger CMOS technologies. The problems inherent to PETEOS deposition are presented and several solutions are discussed. Adequate film contours can be obtained by the formation of a simple spacer plus a thick film etchback step. Other approaches discussed include a single deposition and etchback, multiple spacer formation, sloped metal profiles, planarization, and profile modification with physical sputtering.

Citation Download Citation

G. W. Hills, A. S. Harrus, and M. J. Thoma "Plasma Assisted Deposition and Device Technology: Interlevel Dielectric Considerations", Proc. SPIE 1185, Dry Processing for Submicrometer Lithography, (30 January 1990); https://doi.org/10.1117/12.978050

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