Paper
1 November 1992 Systolic array architecture for real-time Gabor decomposition
Giridharan Iyengar, Sethuraman Panchanathan
Author Affiliations +
Proceedings Volume 1818, Visual Communications and Image Processing '92; (1992) https://doi.org/10.1117/12.131372
Event: Applications in Optical Science and Engineering, 1992, Boston, MA, United States
Abstract
In this paper, we propose a combined systolic array--content addressable memory architecture for image compression using Gabor decomposition. Gabor decomposition is attractive for image compression since the basis functions match the human visual profiles. Gabor functions also achieve the lowest bound on the joint entropy of data. However these functions are not orthogonal and hence an analytic solution for the decomposition does not exist. Recently it has been shown that Gabor decomposition can be computed as a multiplication between a transform matrix and a vector of image data. Systolic arrays are attractive for matrix multiplication problems and content addressable memories (CAM) offer fast means of data access. For an n X n image, the proposed architecture for Gabor decomposition consists of a linear systolic array of n processing elements each with a local CAM. Simulations and complexity studies show that this architecture can achieve real-time performance with current technology. This architecture is modular and regular and hence it can be implemented in VLSI as a codec.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Giridharan Iyengar and Sethuraman Panchanathan "Systolic array architecture for real-time Gabor decomposition", Proc. SPIE 1818, Visual Communications and Image Processing '92, (1 November 1992); https://doi.org/10.1117/12.131372
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KEYWORDS
Content addressable memory

Image processing

Image compression

Visual communications

Very large scale integration

Computer architecture

Matrices

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