Paper
21 October 1996 Embedding large multidimensional DSP computations in reconfigurable logic
Ayman Elnaggar, Hussein M. Alnuweiri, Mabo Robert Ito
Author Affiliations +
Abstract
This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ayman Elnaggar, Hussein M. Alnuweiri, and Mabo Robert Ito "Embedding large multidimensional DSP computations in reconfigurable logic", Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); https://doi.org/10.1117/12.255828
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KEYWORDS
Field programmable gate arrays

Digital signal processing

Logic

Video compression

Video processing

Image processing

Computer architecture

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