Paper
22 May 1998 Free-space architecture for an ATM header processing function
Guido A. Maier, Pierpaolo Boffi, Riccardo Melen, Mario Martinelli
Author Affiliations +
Proceedings Volume 3490, Optics in Computing '98; (1998) https://doi.org/10.1117/12.308902
Event: Optics in Computing '98, 1998, Bruges, Belgium
Abstract
Header Error Control in all-optical ATM switching nodes is discussed. An architecture of an error detection subsystem is designed suitable for free-space parallel optical implementation.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Guido A. Maier, Pierpaolo Boffi, Riccardo Melen, and Mario Martinelli "Free-space architecture for an ATM header processing function", Proc. SPIE 3490, Optics in Computing '98, (22 May 1998); https://doi.org/10.1117/12.308902
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KEYWORDS
Asynchronous transfer mode

Free space optics

Switching

Error control coding

Logic devices

Binary data

Electronics

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