A MEMS micro-cooling system which comprises microchannel, micropump and pin-fin fan-sink technologies is proposed to meet the need of innovative and advanced IC cooling techniques for the microelectronics industry. An analytical study is conducted by employing a self-developed computer code. This study shows that the closed-loop MEMS micro- cooling system under the steady-state condition with water as the coolant has a capacity to remove heated flux as high as 100 W/cm² from the flip chip into the ambient. This can be done while maintaining the maximum temperature on the surface of the flip chip below 100 degrees C. Simulation and analysis of flow and heat transfer performance on this single-phase forced convection MEMS micro-cooling system are performed in both laminar and turbulent flows. The design parameters which include the coolant inlet pressure, the geometry of the silicon microchannel, the ambient temperature as well as the variety of the aluminum pin-fin fan-sink coolers show that these variables all have significant effect on the working performance of the system. The simulation results validated this new compact and highly efficient MEMS micro-cooling system.

This paper presents a new concept for the thermal transient measurement of IC packages. The TTMK thermal transient test kit described here consists of a test chip, a dedicated software running on a PC and a special cable connecting the PC to the IC package which encapsulates the test chip. The function of the thermal transient test equipment is realized partly by the test chip itself and partly by the measuring software. The software performs both the control of the measurements and the evaluation of the results. The output of the evaluation software may be a compact model network or the structure function describing the properties of the heat conduction path. The use of the TTMK kit and the capabilities of the evaluation software are presented in this paper.

A novel method for building microsystems is presented and the performance of a particular electrical connector is evaluated in more detail. The method is based on flexible printed circuit boards made of polyimide (PI) foil. The building technique makes direct use of the good mechanical properties, which normally is not fully utilized, and the foil shape to made resilient, locking and self-supporting shell structures. These structural elements in combination with the functions normally found in flexible printed boards, conductors, from a versatile method for building microsystems. As a demonstrator, an operating micromotor based on mechanical stepping with piezoelectric elements will be presented. An important part in a microsystem is the electrical connections. These are normally attained by soldering, wire bonding or gluing, which all require additional processing steps. With the method presented here it is possible to make pressure connects where all connector functions are integrated in the PI film. Resilient tabs directly processed in the PI film are used as contact elements that press against e.g. a bump on a die. In this paper, both the forces achieved with the PI tabs and the resulting contact resistance is measured as a function of the tab deflection. The experiments are performed in a micromanipulator where a test probe is used to simulate a die bump. Geometrical demands on the microstructures and the limitations of the method are discussed.

This paper presents an extensive review of optimization criteria of thermopile detector. The heat conductance and resistance of thermopile structure, the thermal-electric coefficient of thermocouple, and area of absorption layer are critical to the performance of thermopile. As a result, the critical features like responsivity and detectivity are widely considered and incorporated into a mathematical model in terms of the parameters like sheet resistance and width of polysilicon, length and number of thermocouple, area of radiation absorber, and geometric structures. The effect and correlation of these parameters are evaluated through this way. The design rule of CMOS compatible thermopile sensor is developed based on simulated conclusions. The optimized thermopile structures with responsivity higher than 100V/W, and specific detectivity better than 1 X 10⁸cm(root)Hz/W can be derived. Finally, optimization criteria of thermopile detector is verified and discussed.

In this paper, a parametrical method is developed to design a magnetic microactuator. The method is based on modeling the magnetic microactuator using the finite element analysis software that can be used to calculate the energy density and magnetic force. Here, the concept of design on experiments (DOE) is used to identify critical parameters that affect the performances of the electromagnetic microactuator. Numerical simulation results from a series of DOE have indicated that the dimension of core and the magnetic material block have the influence on planar electromagnetic actuators. When the length of the magnetic components is equal to that of outer diameter of coil circuit, we obtain the best efficiency in magnetic force. Furthermore, when we increase the thickness of the magnetic materials block or shorten the distance between the coils and magnetic materials block, the magnetic force will increase dramatically. In addition, we can achieve a great magnetic force when the combination ratio of the length of the core is half of the magnetic material block. Simulation results have shown that electromagnetic actuators with high aspect ratio planar cold could sustain higher electrical current that consequently increases the magnetic force. During the realistic fabrication, the thick resist patterning and electroplating technologies is used to fabricate the above-mentioned electromagnetic microactuator. Experimental results indicated that the magnetic force follows closely to the simulation results.

The paper presents the model of a complete multidomain system involving two opto-electronic components: the emitter and the receiver. It is written in Anacad Mentor Graphics HDL-A and integrates the propagation environment characteristics and the thermal behavior of each components. First, packages describing electrical, optical, and thermal behavior of each component. First, packages describing electrical, optical, and thermal domains are detailed. Second, the models of the components are explained. They include an electrical, a thermal and an optical part, the latter being particularly developed. Third, the models of the propagation environment, an optical fiber and the related free space, are presented. The components are assembled to build a compete instrumented opto-electronic transmission system. The laser diode emits a digital clock through an optical fiber to a photodiode. The laser diode is thermal controlled through a Peletier module, which can be deactivated as needed. The alignment of the laser diode with the optical fiber can be studied/modified too. The HDL-A resulting models have been simulated in the ELDO environment. Results show that thermal variations influence the quality of the transmission.

A 3 axis acceleration sensing system has been developed using force balance techniques based around 3 silicon capacitive accelerometers, a custom chip providing signal detection and control actuation and a DSP to implement the control algorithm. The accelerometers have a dual capacitor structure with a cantilevered central plate. The chip features a stray-insensitive switched capacitor integrator which uses synchronous detection to remove noise effects enabling the measurement of very small capacitance changes. On-chip digitization is provided by a sigma-delta converter. A DSP is used to implement a PID control algorithm providing force balance back to the accelerometers. The system has been modeled and simulated using combined mechanical and electrical models and the SABER mixed signal simulator. Good agreement has been obtained between simulated and measured frequency response for the capacitance accelerometers used. Simulations have identified the stable region of operation of the force balance system and enabled selection of the control coefficients. Both simulated and measured results are presented for the 3 axis system.

A new structure of SiC ACCUFET MOSFET for high power applications have been proposed and analyzed by simulation. The new MOSFET has an n-type ion implanted trench region and a MOS structure consisting of a thin surface layer of epitaxially grown n-type SiC. The current flows through then-type ion implanted region, then via accumulation channel of electrons defined in the epitaxially grown SiC surface layer. The thickness and doping of the n-type surface and p-type base epitaxially grown layers control the channel conditions. At zero gate bias the channel is fully depleted by the built-in fields of SiC p-base layer and the gate electrode resulting in a normally off device with the drain voltage supported by the n-drift region. Moreover, this designed structure fully addresses most of the open issues related to the MOS interface problems, i.e. low channel mobility and high electric field in the gate oxide of the MOS structure. 2D numerical simulations demonstrate that the optimized designed structure can withstand the blocking voltage of more than 1000 V, and a low specific on- resistance. The analytically calculated and simulated result son specific on-resistance of the optimized structure show as low a s 19.3 (Omega) cm² specific on resistance can achieved with low gate bias of 5V.

The neu-MOS transistor, recently discovered by Shibata and Ohmi in 1991, uses capacitively coupled inputs onto a floating gate. Neu-MOS enables the design of conventional analog and digital integrated circuits with a significant reduction in transistor count. Furthermore, neu-MOS circuit characteristics are relatively insensitive to transistor parameter variations inherent in all MOS fabrication processes. Neu-MOS circuit characteristics depend primarily on the floating gate coupling capacitor ratios. It is also thought that this enhancement in the functionality of the transistor, ie. at the most elemental level in circuits, introduces a degree of flexibility which may lead to the realization of intelligent functions at a system level. This paper extends the neu-MOS paradigm to complementary gallium arsenide based on HIGFET transistors. The design and HSPICE simulation results of a neu-GaAs ripple carry adder are presented, demonstrating the potential for very significant transistor count, area and power dissipation reduction through the use of neu-GaAs in VLSI design. Due to the proprietary nature of complementary GaAs data and SPICE parameters, the simulation result are based on a representative composite parameter set derived from a number of complementary GaAs processes. Preliminary simulations indicate a factor of 4 reduction in gate count, and a factor of over 50 in power dissipation over conventional complementary GaAs. Small gate leakage is shown to be useful in eliminating unwanted charge buildup on the floating gate.

In recent years great attention has been paid to the thermal issues in electronics design on system, board, package and chip level, including thermal and electro-thermal simulation of integrated circuits and MCM-s, or even integrated microsystems. In this paper we address some algorithmic issues regarding the method of simultaneous iteration. With the node reduction algorithm outlined here electro-thermal simulation of large problems becomes feasible. Besides this algorithmic innovation we provide a specification for a modular, platform independent electro-thermal simulator.

There are numerous sources of noise present in the VLSI integrated circuits. A function that can measure the ability of a digital logic circuit to operate error-free in a noisy environment is noise margin which can be define in several ways from the transfer characteristic of the logic circuit. It is critical to be able to precisely evaluate a noise margin for Gallium Arsenide circuits, as its value is usually limited to the extent that only NOR gates are allowed in DCFL digital circuits and NAND gates, where stacked pull down transistors would be required, are excluded. In the paper, the best-case and worst-case static noise margin are discussed and it is shown that not only the load but also the noise voltage has to be included when evaluating a transfer function. Fortunately, the best-case noise margin can still be calculated with the nose free transfer function. But the more useful worst-case noise margin is shown to depend on the transfer function including the noise source. Therefore, as was already pointed out by Lohstroh for CMOS circuits, the best way to calculate the noise margin is to start a quasi-static transient simulation with all noise sources being zero and by increasing the amplitudes of the noise sources slowly compared to the switching speed of the logic circuits. The worst-case noise margin is then found as the noise amplitude at which the chain exhibits a malfunction. Since an infinitely long chain is sown to be equivalent to a flip-flop the flip-flop can be used for the simulation instead. The examples of an inverter and an AND gate illustrate the theory presented.

In certain dynamic systems, the addition of nose can assist the detection of a signal and not degrade it as normally expected. This is possible via a phenomenon termed stochastic resonance (SR). The response of a nonlinear system to a sub-threshold periodic input signal is optimal for some non-zero value of noise intensity. Using the signal-to-noise ratio (SNR) we can characterize SR - as the noise increases the SNR rises sharply, which is followed by a gradual decrease. We investigate the SR phenomenon in several circuits and numerical simulations. In particular, the effect that the system linearity has on the amount of gain introduced by SR and the effect of varying the input signal strength. We demonstrate, for a thresholding system, as much as a 20 dB improvement in SNR, which may be increased by further investigation. Although SR occurs in many disciplines, the sinusoidal signal itself is not information bearing. To greatly enhance the practical applications of SR, we require operation with an aperiodic broadband signal. Hence, we introduce aperiodic stochastic resonance (ASR) where noise can enhance the response of a nonlinear system to a weak aperiodic signal. As the input signal is aperiodic, an alternative quantitative measure is required rather than the SNR used with periodic signals. We can characterize ASR by the use of cross-correlation-based- measures. Using this measure, the ASR in a simple threshold system and in a FitzHugh-Nagumo neuronal model are compared using numerical simulations. Using both weak periodic and aperiodic signal we show that the response of a nonlinear system is enhanced, regardless of the signal.

Power electronics has made great advances since the introduction of the thyristor in 1958. Even a casual study of consumer electronics have steadily replaced passive circuits. Switched mode circuits can accommodate higher power densities, they are lighter, cheaper and easier to control. The use of microprocessors and microcontrollers can make switched mode circuits even more versatile. Unfortunately, there are some problems with switched mode circuits. The higher power densities handled by these circuits can cause catastrophic failure. Periodic switching can give rise to acoustic noise or undesirable electromagnetic radiation. These problems can be reduced through the use of random switching policies. One theoretical disadvantage of random switching policies is that the time averaged switched system is not strictly equivalent to the classical system with the same average parameters. The stability limits for the randomly switched and classical system are different. This is a possible area for concern, given the high power densities and the possibility of catastrophic failure. In this paper we examine the stability of randomly switched control systems. We provide simulations, some analysis and derive some practical rules for stability. We show that some randomness can be beneficial from the point of view of minimizing power spectral density of the noise waveforms in the output current.

Verifying the correctness of asynchronous sequential circuits is one of the most important tasks in asynchronous design. However, the absence of the global clock and the variation of gate delays in asynchronous circuits make the verification a formidable task. In this paper, a method that can perform efficient timing analysis of gate-level implementation of asynchronous circuits is presented. The method is based on specific behavior given by the Signal Transition Graph (STG). By modifying the STG into the STG control graph, the circuit can be simulated correctly with automatic test generation. The ternary logic is introduced in order to describe the behaviors of gates with bounded inertial delays. The program is written in VHDL. Lastly in this paper, one of the many simulation results to detect hazards is presented.

In this paper the theoretical analysis of noise sources in OCDs is given and the relation between typical defects and 1/f, g-r and burst noise is described. According to statistical results, a threshold to screen potential devices with excess noise is derived. It has been proved both in theory and by experiment that the screening criterion proposed is reasonable. Moreover, the experimental results show that the screening method of OCDs is of practical value.

The design, fabrication and characterization of a micro-pump for drug delivery are presented in this paper. A low cost metallic micro-pump capable of handling low fluid volumes and having the potential for application in drug delivery is described. The pump is of the reciprocating displacement type and is driven by a piezoelectric diaphragm actuator. The main parts of the pump are made of stainless steel and can be readily fabricated using precision casting technology. The check valves are made form a polyamide membrane using photolithography. Equations presented in this report are useful for predicting the behavior of the actuation unit as well as the valve unit. Based on the analysis, a prototype of the micro-pump is designed and fabricated, from which a maximum pump rate of 255ul/min for water was achieved.

A prototype of an x-ray microcalorimeter using Titanium/Gold transition edge sensor (TES) for detecting cosmic rays is fabricated and tested. This paper reports first experimental result of the prototype. By using silicon bulk micromachining, freestanding microstructure suspended with fine beams are obtained to achieve thermal isolation from the substrate. A superconductor, Ti in this case, can be used as a very sensitive temperature sensor at the narrow temperature range around its transition temperature. At the low temperatures below 1K, the microstructure with very small heat capacity is expected to be thermally detecting single photons. Design consideration to realize radiation detection with extremely good energy resolution has been taken place. Our tentative goal is to obtain the energy resolution of 20eV for 10keV radiation at 0.5K. We have fabricated a test device of the TES. The sensitivity of it is larger than 1000, which is enough for this purpose. The energy resolution of the prototype of the x-ray microcalorimeter was 550eV for 6keV radiation at approximately 0.5K. This value is smaller than that expected. An optimization of the TES features is still necessary for a good energy resolution.

This paper describes the design of a single chip magnetic field based tactile sensor for variety of applications, especially the robotic applications. The sensor can be fabricated using MEMS technology. The tactile sensor can measure both the normal and shear forces. The sensor makes use of a thin magnetic material sheets embedded in an elastomer. An array of magnetic field probes are placed below the magnetic material. The instrumentation or the signal processing circuitry could be placed below the magnetic field probes or placed next to the transduction layer. A computer aided-design study was carried out to understand the distribution of field patterns due to thin square magnetic sheets both singularly and in arrays. The choice of the optimum dimensions for the magnetic sheets, their spacing within the array, and their height from the magnetic field probes is presented.

We describe a programmable capacitor technology under development at NCSU and its potential application in building programmable interconnect devices useful for system level connectivity functions, phased array beam steering, and RF switching. Crossbars are made from arrays of electrostatically controlled bistable MEMS-based capacitors. These new devices allow faster signaling and consume less power than BiCMOS crossbars. They also allow critical RF components to be shrinked in size substantially. We describe the essential elements of these arrays and present results obtained so far.

There are many applications where ultra-fast digital arithmetic circuits are required. At ultra-high speeds a considerable part of power is dissipated within a clock generation and distribution syste. At the same time, at gigahertz frequencies the clock skew becomes a factor limiting the speed of the system. This paper presents a design methodology for highly pipelined, self-timed circuits and systems suitable for multimedia applications using Gallium Arsenide MESFET as the base technology implementation of latched logic design style (PDLL, LCFL). The use of latched logic together with the absence of the global clock provides for low power dissipation while maintaining very high speed of the system. The main advantage of the latched structure is provided by the feedback which ensures that the nose margin is higher than for a simple Direct Coupled FET Logic gate. This enables to use serial connections of the E-type transistors in the pull-down section. Therefore, in GaAs latched logic it is possible to implement logic gates based on the AND function which have several control inputs and that they generate at least one control signal for handshaking. For the typical 4- phase handshaking protocol the input signals are enable and start and the required generated signal is Done. In the paper the appropriate modifications of the handshaking protocol to accommodate the properties of the latched logic GaAs circuits is presented an the inherent latching property of LCFL is exploited to eliminate latches separate from the logic blocks in the classic pipeline. Several circuit examples demonstrate the advantages of the proposed circuit techniques.

This paper describes the design of very high speed optoelectronic analog digital converter based on a digital division algorithm called SRT division using n-i(MQW)-n self electro-optic effect device (SEED) technology. The proposed structure is a pipeline ADC. The SRT algorithm was chosen because it provides a redundancy per stage of the pipeline. The amount of redundancy is dependent on the radix of the SRT algorithm and the number set chosen. The relation between the SRT radix, number set and the division full range is given in this paper. Also a macro-model for the n- i(MQW)-n device was developed and used to simulate all the circuitry and algorithmic operations needed for the ADC. These included analog addition, analog subtraction and integer multiplication. Based on the developed macro-model and n-i(MQW)-n SEED circuit modules a basic unit of the algorithm ADC was designed.

A newly developed micromirror device that possesses two rotational and one displacement degrees of freedom has been designed and fabricated by using surface micromachining technology. The device consists of a micromirror, four vertical thermal-actuator arrays and four torsion bars that connect the mirror and the actuator. The vertical thermal actuator has the capability to elevate from its origin position. To demonstrate the feasibility of the vertical thermal actuator, various layouts and sizes has been designed. The present device was fabricated through the Multi-User MEMS process. When the controlled signal is applied to any two adjacent thermal-actuator arrays of the device, the remaining two thermal actuator arrays and torsion bars will act as the supporting beams that allow the micromirror to experience rolling or pitching motion. On the other hand, by applying controlled signals to all four thermal-actuator arrays synchronously , the micromirror would elevate vertically. Note that different rolling or pitching angle of the micromirror can be archived by designing the locations of the torsion bars with vertical thermal actuators. Through the process, a compact, extremely light in weight, potentially low cost, and operating in very low voltage micromirror device with various applications can be obtained.

We have developed a new paradigm, based on massively parallel analog processing coupled with a MEMS micromirror device, for developing intelligent vision systems that is capable of performing adaptive optics at rates exceeding 1 kHz and 3D imaging at bandwidths exceeding 100 Hz. The design and modeling methodologies associated with our smart vision chip are presented along with experimental results that characterize its performance. We also present design and modeling methodologies of our micromirror devices along with experimental result that characterize their performance in typical adaptive optic systems. Finally, we present modeling and simulation methodologies of adaptive optics systems along with experimental results used to design and test an adaptive optic system. The design and modeling methodologies that are presented lend themselves to facilitating the design and development of a wide variety other sophisticated vision systems. In addition to speed, our approach offers advantages in low cost batch fabrication, compact size, low power consumption, and radiation tolerance, making it ideal for many applications.

The Horridge template model is an empirical motion detection model inspired by insect vision. This model has been successfully implemented on several micro-sensor VLSI chips using greyscale pixels. The template model is based on movement of detected edges rather than whole objects, which facilitate simple tracking techniques. Simple tracking algorithms developed by Nguyen have been successful in tracking coherent movement of objects in a simple environment. Due to the inherent edge detection nature of the template model, two closely spaced objects moving at the same speed relative to the template model sensor will appear to have a common edge and hence be interpreted as one object. Hence when the two objects separate, the tracking algorithm will be upset by the detection of two separate edges, resulting in a loss of tracking. This paper introduces a low-cost vision prototype, based on a color CMOS camera. Although this approach sacrifices auto gain control at each pixel, results are valid for controlled lighting conditions. We demonstrate working result, for indoor conditions, by extension of the template mole using the color CMOS sensor to form color templates. This enables the detection of color boundaries or edges of closely moving objects by exploiting the difference in color contrast between the objects. This paper also discusses the effectiveness of this technique in facilitating the independent tracking of multiple objects.

This paper reports our effort to study the failure mechanisms and high temperature behavior of Ni wire bonds. Ultrasonic wire bonding was used to bond 25 micrometers -diameter Ni wire to 7500 angstrom thick Ni pads deposited on 3C-SiC substrates. A series of high temperature experiments which include electrical characterization, annealing tests, and in situ pull test were conducted to test the reliability of the wire bonds at temperatures up to 550 degrees C. In situ pull test were also performed on samples prepared by thermosonic wire bonding. Scanning electron microscope was used to investigate the formation of brittle cracks on the heel of the bonds, to compare the feet of new and used wedges, and to examine the surface texture of wire bonds exposed to high temperatures.

A non-destructive optical characterization technique is used for the investigation of HgCdTe photovoltaic devices. The technique uses a scanning laser microscope to obtain Laser Beam Induced Current (LBIC) data from which it may be possible to extract information such as junction depth, array uniformity, and other material and device parameters. LBIC has been previously used only as a qualitative technique, but in this work the procedure is being developed into a quantitative tool. At present the only junction depth profiling techniques are destructive, while array uniformity can only be examined after bonding to readout circuits. In this paper we present both theoretical and experimental; results which show that LBIC can be employed as a quantitative tool for device characterization. The primary measure of performance of IR detectors is the zero bias dynamic resistance junction area product, R₀A. LBIC measurements indicate that the peak LBIC signal varies by a factor of approximately 2 for long wavelength RI photodiodes for which the R₀A varies between 70 (Omega) cm² and 8 (Omega) cm².

A novel, very high-performance fuzzy logic processor architecture has been developed and conceptually proven. Processing of over 1.2 billion fuzzy logic instructions per second is possible. It is an 8-bit, fully parallel, synchronous, pipelined employing max-min based rule inferencing. The concept has been proven using complex programmable logic devices (CPLDs), exploiting both the high gate count and I/O pin count, as well as the reconfigurable structure. True non-singleton center-of-gravity defuzzification has also been developed incorporating an optimized dividing speeds significantly greater than the currently available commercial deices. Implementation in CPLDs allows reconfigurability in the fuzzy logic design, while custom devices allow a much greater degree of integration and potential for even greater processing speeds. High speed fuzzy logic processing is particularly suited to high bandwidth data processing applications such as virtual reality.

A new generation of electrostatic micro-motors is investigated using cooperation of arrayed direct-drive actuators. Electrostatic scratch-drive actuators (SDA), which combine active frictional contact mechanisms with electrostatic actuation, are particularly analyzed. Active polysilicon sheets of 2*3 mm² that integrate up to several thousands of electrostatic scratch drive actuators are fabricated by silicon surface micro-machining process. Each elementary actuator provides its contribution according to the driving force superposition principle, with internal forces as high as 10⁵uN are available from this sheet. According to their natural flexibility, active polysilicon sheets can be coated onto large surfaces. A new generation of self-assembled tubular electrostatic micromotors is developed using this concept. A prototype of a cylindrical micromotor, whose external diameter and length are 1 mm and 2 mm, respectively, has been realized through the insertion of a flexible active polysilicon sheet at the rotor/motor- frame interface. After final assembling, the sheet has to be jammed onto the chassis, in order to allow the rotor to be moved with respect to the motor frame. Thus, the sheet must be in close contact with both the rotor and the motor frame, whatever the gap, which separates the two macroscopic parts. The problem related to the micro/macro world interfacing is solved during the design of sheet in allowing an out-of- plane motion of SDA in order to provide a self gap compensation, whatever both the thermal expansion effects and the macroscopic machining tolerances. The expected driving characteristics show the interest of both cooperative arrayed microactuators and direct drive frictional mechanisms.

Our researchers were devoted to the development of a suitable procedure to determine the internal stress and the Young's module in the polysilicon layers useful for micromachining applications. We used for the stress measurements the pull-in voltage method, but we elaborated a new set of the relations able to extract properly the value of the stress and the Young's module by a suitable fitting procedure. We present the origin set of equations and we show that the interest material parameters are deduced in this case by an iteration procedure consisting in a multiple step numerical processing. We show that it is possible to deduce an approximate relation useful for a fitting procedure in a single step only. The result were corroborated with determinations in by secondary relation useful for a fitting procedure in a single step only. The results were corroborated with determinations by secondary ion mass spectroscopy and the spreading resistance technique to optimize the technological process for the fabrication of the polysilicon micromechanical elements. We applied the developed method for the determination of the stress and young's module in the micromechanical polysilicon structures. The stress induced in the polysilicon layers by the technological processes is a result of the doping and structural properties during the technological processes: the low-pressure vapor deposition, the phosphorus prediffusion and the drive-in diffusion during the subsequent heat annealing treatments. The pull-in voltage technique was applied for the rapid determination of the internal stress to permit the necessary process corrections. The result of our analysis allow us to show that the post- doping annealing conditions could be varied in a convenient manner, so that the doping induced stress gradients into the polysilicon layers to be reduced or completely eliminated. A mechanism which we propose to explain the doping gradients into the polysilicon layers is shortly presented.

A new algorithm, Square-and-Multiply for Modular Exponentiation (SMME), is proposed to calculate a modular exponentiation that is the core arithmetic function in RSA cryptography. The SMME scans the exponent form its MSB and pre-computes a set of exponents to the maximum bit length of l. These pre-computed exponents are stored in a look-up table. By using the look-up table, the number of multiplications required for modular exponentiation can be reduced. Modular multiplications are performed using a modified Montgomery's algorithm. The SMME takes in the order of n²(1 + 1(2l)) cycles to execute one n-bit modular exponentiation. The memory size to accommodate the pre- computed exponents is a 2^l-1 (n + 1)-bit RAM. The SMME, with its regularity and local connections in a systolic array, makes it suitable for VLSI implementation. A 64-bit modular exponentiation chip is being designed using a 0.8 micrometers CMOS standard cell library from AMS. The simulation result show that at 25 MHz, the throughput is approximately 236 KBps; and an estimation of 40 KBps for a 512-bit exponent.

Modeling packaged electronic elements is encumbered by parasitic effects and discontinuities causing enlarged parameters and is done using numerical field simulation in reference to result of on-wafer measurements and calculated emitter inductance. Package simulation has revealed certain problems with discontinuities and disruption of automatic adjustment that can be eliminated using the sliding mode characterized by reduced order of mathematical support and feedback from discontinuities. Analysis of bipolar transistor models show inadequacies of currently accepted concepts of dynamic systems, with high factors of uncertainty due to unambiguous solutions. RF measurements of prospective transistors can be done using wafer measuring techniques. The smooth RF characteristics of the interior transistor as well a limited number of parameters yield a mode with good agreement for both DC- and RF characteristics. It is our purpose to achieve a model suitable for use with all types of circuit simulations. The ports for chip connection are concentrated or internal ports defined by voltage and current. The resulting S-parameters of the ports are used to extract equivalent circuit elements leading to well define values with physical sense. The essential components of the packaging model are the sliding mode indicator, observer and the anticipatory device.

The significance of the nonlinearity of HEMT capacitance models to the prediction of intermodulation is investigated. Three capacitance models, one linear and two with contrasting nonlinear behavior, are shown to exhibited almost identical performance. It is concluded that the nonlinearity of the low-frequency model is the dominant distortion generating component. Development of capacitance models with accurate high-order derivatives is unwarranted without an accurate dc model. Therefore, careful characterization of the drain current description is most important for successful circuit simulation.

The design of a micromirror for a projection TV is investigated. A static structural analysis is performed to give an optimal shape of the micromirror using the FEM commercial package, ANSYS. A solid modeling is created, and mapped meshes are applied to it in order to satisfy a symmetric condition. A stress analysis shows that maximum stress does not exceed an allowable stress, which is the yield strength. A modal analysis is also executed to find the approximate natural frequencies with different design parameters. The result can be utilized to see which design parameter is strongly dominant. The micromirror was fabricated by Samsung Electronics. Dynamic deflection experiments confirm the results of the simulation.

A magnetostrictively actuated silicon-based micro-resonator has been fabricated in a simple process, including thin film deposition of the active material by sputtering. The aimed application is a 2D-Optical-Scanner, for which horizontal and vertical light deflections can be achieved by bending and torsional vibrations of a magneto-elastic bimorph structure. Static and dynamic magnetostriction phenomena are described according to a simple model. Mechanical characterization of three different actuators was performed by using a laser Doppler vibrometer. The vibration amplitude behavior are presented for two different orientations of the applied magnetic field, revealing two important capabilities of the actuator: there is no need of steady state biasing and the ratio of bending/torsion vibration amplitudes is tunable. Measurement of the frequency characteristics around resonance led to the evidence of different nonlinear behaviors for the two resonant modes under considerations. Moreover, some unwanted phenomena, which are induced by the fabrication process, have also been revealed.

CORDIC rotation engines have become with primary hardware- computing modules for realization of trigonometric functions in real time digital signal processing. We propose an area- time efficient architecture for redundant CORDIC with significant power savings. The precomputation of signed digits for rotation mode leads to a reduced transition density in the Z-recurrences. This leads to a reduced switching activity that results in lower power dissipation. The parallelized generation of the signed digits in the CORDIC rotation engine results in over 30 percent savings in hardware with significant speed up of operation. As no estimates are used for the precomputation of the singed digits no correcting rotations are necessary. The number of iteration that needs to be repeated is one irrespective of the accuracy of operation needed and the scaling factor is constant. The computation of the signed digits is removed from the critical path of the design and the response time of the circuit is dependent only on the full adder delay in the CMOS technology library used for implementation. The designs for 16-bit, 24-bit and 32-bit redundant CORDIC architectures incorporating the precomputation of signed digits are presented. The architecture for precomputation of the signed digits is simulated using SYNOPSIS VSS. The functionality simulated design is synthesized with SYNOPSIS design analyzer. The switching power is estimated using SYNOPSIS DesignPower. The proposed architecture is compared with relevant designs in literature.

While analyzing on the logical level of the digital schemes taking into consideration the external effects, each unit of the scheme is characterized by the variable Q, the value of which points not to the stationary condition of the unit 0 or 1, but to the degree of difference between the state of the given unit and the stationary condition f the value of an external effect. The state of the given unit are input besides the usual variables in to the logical function of each element. These dependencies are different models for determining the external effects. The system of analysis of programs must be open with respect to models type for determining the external effects. The approach described above has been realized in the system of modeling programs of digital integral schemes in sliding mode and the experiments carried out allow as to state that this strategy increases the functioning speed for more than 10 orders while the loss of accuracy is 1-5 percent.

In this study, we found electrochemical wetting on a surface of a silicon substrate by direct voltage. The surfaces of silicon substrates do not have good wettability in usual condition. We observed here that a wetting area between a silicon substrate and a ultrapure water drop on the silicon surface expanded and a contact angel became almost zero degrees when direct voltage was impressed. Voltages inducing wetting are various and are dependent on crystal directions of substrate surfaces, voltage directions, and so on. However, this phenomenon is irreversible for ultrapure water. Next, experiments using some solutions containing several kinds of ions instead of ultrapure water were conducted. In general, drops of the solutions spread by lower voltage than drops of ultrapure water. When a cathode is contacted to a substrate an anode is immersed in a drop of sodium sulfate solution, the spread of the drop occurs. Then, shrinkage is observed when the reverse voltage is applied. Surface tension is a dominant and important force to micro size structures. At last, we show some types of micro actuator using surface tension controlled electrically in order to apply these phenomena to MEMS.

The paper discusses a general procedure for synthesis of concurrently self-checking control units providing prescribed level of fault coverage. The micro-program control is considered though the proposed approach can easily be extended to cover other control unit architectures.

This paper reports the observation of defect-related anomalous low temperature drain current-voltage characteristics in AlGaN/GaN MODFETs. We have performed our study on devices with a relatively large number of lattice defects, generally referred to as nanopipes, in their active area. The observed low temperature anomalies appear as 'kinks' in the I_ds-V_ds characteristics and are observable at temperatures < 210 K. In a device with a large density of defects, we observe current collapse and large threshold voltage shifts at 80 K, which depend on bias history. We attribute the observed behavior to impact ionization of charge accumulated in the AlGaN layer by high- energy electrons injected from the 2DEG via real space transfer. The existence of these mechanisms indicates that device self-heating is not the solely responsible for the negative differential resistance at high electric fields in AlGaN/GaN MODFETs. These mechanisms may have significant influence on the high frequency performance of power transistors and on our current understanding of high electric field parallel transport phenomena in III-nitride heterojunctions.

The potential of a passive integrated millimeter-wave radiometer is being investigated as a compact, low cost, all-weather complement or even alternative to current radar detection and imagin systems. A major advantage of millimeter-waves over other radio frequencies, is the ability to propagate through smoke, fog and cloud, at certain 'window' frequencies.

A new fabrication method suitable for cheap assembling of MEMS and MOEMS is described. As a present, the very expensive methods for assembling and packaging, applied in the case of MEMS and MOEMS, make almost prohibit the final cost of a new prototype. For this reason it is so important to reduce the prize of the assembling techniques, and to find a way for batch mounting and packaging. The proposed method consists of generating a high aspect ratio structure, by means of soldering some different shaped metallic foils. The technological process consists of the following steps. In the first step, the desired 3D structure is divided into N different levels, while maintaining the thickness of each of them between 10-300 micrometers. Next, the pattern for each level is achieved by applying, to the copper metallic substrates, a double side lithography, commonly used in printed circuits fabrication, such as: solid negative resist lamination; UV exposure; alkaline spray developing, and acid spray etching. After a double side Sn-Pb electroplating of each metallic foil, all of them are properly stacked and aligned in a frame, by means of some special etched holes. The resulting stack is pressed and heated at soldering alloy's melting temperature, preferably by using a vacuum system. Finally, the temperature is ramped down and the pressure is released, resulting in the desired 3D arbitrary shaped sandwich type structure. This new technique opens wide perspectives to replace some expensive assembling methods, in a variety of prototypes containing MEMS and MOEMS, being also recommended for metal can packaging in special applications and microfluidic devices assembling too.

Wafer level packaging received lots of attention in microsystems recently. Because it shows the potential to reduce the packaging can be increased. However, there is a limitation of commercialized wafer bonding technology, i.e., the high process temperature, such as 1000 degrees C of silicon fusion bonding, and 450 degrees C of anodic bonding.A novel low temperature wafer bonding with process temperature lower than 160 degrees C is proposed, it applies the In-Sn alloy to form the interface of wafer bonding. The experiment results show helium leak test of 6 X 10^-9 torr-liter/sec, and a tensile strength as high as 200kg/cm². Reliability test after 1500 temperature cycles between -10 to 80 degrees C also shows no trace of degradation compared to the initial quality of the samples. This low temperature soldering process demonstrates its promising potential at the wafer level packaging in industrial production.

In order to realize fine microstructures with high aspect ratio, tow kind of thick-resist-based metal molding processes were studied. A novel technique obtaining fine line/space and high aspect ratio thick photoresist patterns on a glass substrate by the simple UV lithography was developed. A three-layer resist method using reactive ion etching (RIE) for patterning thick photoresist was also examined. The former method is to use fine thin metal patterns formed on the glass substrate as the exposure mask. A thick negative photoresist is coated on it and UV light is illuminated from the backside. Perfect contact between mask and photoresist is obtained and the influence of light diffraction is also avoided. By using SU-8 as the negative photoresist, minimum line/space of 1 micrometers and high aspect ratio of about 5 was achieved. The metal layer is served as a seed layer for Ni electroplating as well. Metal microstructures were also fabricated by the three-layer resist method using the thick photoresist-thin SiO₂-thin photoresist structure. Even an usual contact UV lithography was applied to pattern the thin photoresist layer and a usual CCP-RIE was used to etch the SiO₂ and thick photoresists layer, at least 1 micrometers gap microstructures were obtained by the Ni electroplating. Micro-packaging method using SiO₂-SiO₂ bonding with hydrofluoric acid was also studied. HF bonding conditions suitable for micropackaging were examined under different HF concentration, pressure, and temperature. Reasonable bond strength equal to that by the anodic bonding is obtained under high-applied pressure during bonding. Packaging method is posed using combination of the thick-resist-based molding and the HF bonding.

Electrohydrodynamic (EHD) enhancement of pool boiling may improve heat-sinks used in micro-electronic devices. The effect depends on the applied electrode voltage. Mathematical models for the heat transfer coefficient with refrigerant R11 for boiling in both free convection and nucleate regions are developed from experimental results. The results show that heat removal is enhanced by 250 percent in the free convection region, and by a lesser amount in the nucleate region.

Rapid positioning devices having nanometer accuracy are being used in the production of semiconductors. Micro- mechanical-oscillators made by silicon surface micromachining are expected to suit with such devices, according to their direct-drive capabilities. This communication investigates a first generation of microconveyers using high density arrays of micro- mechanical-oscillators. Densities as high as 1000 actuators/mm² have been already achieved, therefore allowing shape recognition using tactile information on the near future. Thus, depending on the overall size of the conveyance system, millimeter size moving parts having different shapes are expected to be selected, and then independently distributed onto intelligent surfaces. The proposed conveyance system have been fabricated using a multi layer silicon surface micromachining process. Basically, electrodes are deposited onto a silicon substrate, in order to selectively address each elementary actuation cell. Each elementary cell is mechanically connected to a 1.2 micrometers thick polysilicon sheet frame which is deposited above distributed electrodes. The oscillators are activated by electrostatic force. The operating mechanism that is investigated in the communication is as follow: out-of-plane displacements of the frame are synchronized with the motion of mechanical oscillators, in order to allow the declutching mechanism which is needed to convey the moving part. The very first presented here allow us to expect a nanometer positioning resolution in open loop-control.

Synchrotron radiation, its production and some applications are presented with special regards to the main characteristics needed by most users and the various optics on for generating synchrotron light from bending magnets, undulators, and wigglers. In parallel to the development of various generations of increasingly powerful synchrotron light sources, compact and simply designed synchrotrons have been built for maximum x-ray output and uptime for industrial use or as smaller regional facilities. The use of synchrotron radiation for industry-related applications has increased continuously during the past 10 years and the demands in some fields like x-ray protein crystallography are expected to grow dramatically.

New developments for x-ray nanomachining include pattern transfer onto non-planar surfaces coated with electrodeposited resists using synchrotron radiation x-rays through extremely high-resolution mask made by chemically assisted focused ion beam lithography. Standard UV photolithographic processes cannot maintain sub-micron definitions over large variation in feature topography. The ability of x-ray printing to pattern thin or thick layers of photoresist with high resolution on non-planar surfaces of large and complex topographies with limited diffraction and scattering effects and no substrate reflection is known and can be exploited for patterning microsystems with non-planar 3D geometries as well as multisided and multilayered substrates. Thin conformal coatings of electro-deposited positive and negative tone photoresist have been shown to be x-ray sensitive and accommodate sub-micro pattern transfer over surface of extreme topographical variations. Chemically assisted focused ion beam selective anisotropic erosion was used to fabricate x-ray masks directly. Masks with feature sizes less than 20 nm through 7 microns of gold were made on bulk silicon substrates and x-ray mask membranes. The technique is also applicable to other high density materials. Such masks enable the primary and secondary patterning and/or 3D machining of Nano-Electro-Mechanical Systems over large depths or complex relief and the patterning of large surface areas with sub-optically dimensioned features.