Novel low-voltage low-power Gb/s transimpedance amplifier architecture

Drew Guckenberger; Kevin Kornegay

doi:10.1117/12.499081

21 April 2003 Novel low-voltage low-power Gb/s transimpedance amplifier architecture

Drew Guckenberger, Kevin Kornegay

Proceedings Volume 5117, VLSI Circuits and Systems; (2003) https://doi.org/10.1117/12.499081
Event: Microtechnologies for the New Millennium 2003, 2003, Maspalomas, Gran Canaria, Canary Islands, Spain

Abstract

A novel current-mode transimpedance amplifier (TIA) architecture is proposed for optical receivers. This new architecture, based around the use of a uniquely biased common-base current buffer stage, allows stable, DC coupled TIAs to be designed in bipolar or CMOS processes operating from extremely low supply voltages and using very low levels of power. Noise performance is comparable to that of higher power designs that operate from higher supply rails. Simulation results have been obtained for a 47GHz fT SiGe BiCMOS process and also 0.25μm CMOS.

Citation Download Citation

Drew Guckenberger and Kevin Kornegay "Novel low-voltage low-power Gb/s transimpedance amplifier architecture", Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003); https://doi.org/10.1117/12.499081

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