A novel reconfigurable image-processing system using multi-processor

Hai-cen Mao; Tian-xu Zhang; Wei-dong Yang; Meng Li

doi:10.1117/12.654548

3 November 2005 A novel reconfigurable image-processing system using multi-processor

Hai-cen Mao, Tian-xu Zhang, Wei-dong Yang, Meng Li

Proceedings Volume 6044, MIPPR 2005: Image Analysis Techniques; 60440P (2005) https://doi.org/10.1117/12.654548
Event: MIPPR 2005 SAR and Multispectral Image Processing, 2005, Wuhan, China

Abstract

This paper presents a type of real-time image-processing system based on multi- processor (TI 320C6400). Modularization is adopted in this system. The system is multi-bus architecture. In each basic module communication is implemented via local bus. Between modules communication is implemented via so-called "Links" and multi-channel buffered serial ports (McBSP). The system is flexible and scalable and can be programmed as pipelined or SIMD or MIMD architecture to meet the variability of the parallel algorithm of image processing.

Citation Download Citation

Hai-cen Mao, Tian-xu Zhang, Wei-dong Yang, and Meng Li "A novel reconfigurable image-processing system using multi-processor", Proc. SPIE 6044, MIPPR 2005: Image Analysis Techniques, 60440P (3 November 2005); https://doi.org/10.1117/12.654548

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available