Laser diodes are of paramount importance for on-chip telecommunications applications, and a wide range of sensing devices that require near-infrared sources. In this work, the devices under test are vertical-cavity silicon-integrated lasers (VCSILs) designed for operation at 845 nm in photonic integrated circuits (PICs). We focus on the analysis of the degradation of the optical performance during aging. To investigate the reliability of the devices, we carried out several stress tests at constant current, ranging from 3.5 mA to 4.5 mA representing a highly accelerated stress condition. We observed two different degradation modes. In the first part of the experiments, the samples exhibited a worsening of the threshold current, but the sub-threshold emission was unaffected by degradation. We associated this behavior to the diffusion of impurities that, from the p-contact, were crossing the upper mirror implying a worsening of the DBR optical absorption. In the second stage of the stress test, the devices showed a higher degradation rate of the threshold current, whose variation was found to be linearly correlated to the worsening of the sub-threshold emission. We related this second degradation mode to the migration of the same impurities degrading the top DBR that, when reaching the active region of the laser, induced an increase in the non-radiative recombination rate. In addition to that, we related the two degradation modes to the change in series resistance, which was ascribed to the resistivity increment of the top DBR first and of oxide aperture afterwards.
We present work towards a visible wavelength tuneable external cavity laser (ECL) on a silicon nitride platform working around 640 nm. A ring resonator Vernier structure on the photonic integrated circuit (PIC) provides delayed feedback with spectral filtering and tuning. Gain is provided by a reflective semiconductor optical amplifier (SOA) grown on a GaAs substrate and integrated by pick-and-place flip-chip assembly. In a novel coupling scheme, the 1-dB in-plane placement tolerance is relaxed by a multi-mode edge-coupler to ± 2.6 µm in the direction parallel to the SOA edge and to displacements up to 3.5 µm from the PIC interface along the SOA’s optical axis. Pedestals defined in the PIC guarantee vertical alignment.
Triggered by the need for arrays of individually resolvable excitation foci or trapping potentials in photonics applications, coherent lattice theory describes a unique approach to design structured interference patterns. Typically, large periodicity lattices remain unexplored due to limitations in the theoretical description. Here, we present a method for efficient computation of coherent lattices, successfully covering all periodic and quasi-periodic lattices. The previously unrelated moiré theory and prime number factorization are the foundation of the proposed method. Additionally, we experimentally verify key optical coherent lattices and propose broadening their applicability towards structured light microscopy and optical trapping using photonic integrated circuits.
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