In recent low-k1 lithography, the size of a mask pattern is becoming close to the wavelength of the light source. In a sub-100-nm pattern at wafer scale of 4× masks, transverse electric (TE) polarization light had higher transmittance of the zeroth order than TM polarization for a Cr mask according to rigorous model simulation of a finite difference time domain method. On the other hand, transverse magnetic (TM) polarization light had higher transmittance than TE polarization light for a MoSi mask. From the results of lithography simulation for a 45-nm pattern on the MoSi mask, TE polarization was better for wide exposure latitude, but TM polarization was better for large depth of field. The performance of a current MoSi mask is inferior to that of a Cr mask. However, a lower transmittance MoSi mask has better performance in the exposure defocus window under the dipole illumination. Also, rigorous simulation showed transmittance dependency of the light incident angle to the MoSi mask. The dependency was larger for TM polarization than for TE polarization.
In recent low-k1 lithography, the size of a mask pattern is becoming close to wavelength of the light source. The light intensity through the mask pattern is depending on polarization. TM polarization light is higher transmission than TE polarization light for a MoSi mask. This effect influences not only the zeroth-order light but the first-order light. On the other hand, TE polarization imaging makes higher contrast than TM polarization in two beam interference. Effects of
polarization to resolution are not simple. Since an attenuated phase shift mask is used in order to obtain high contrast, it is necessary to take into consideration the influence of that. It is also taken into consideration that illumination light is not perpendicular incidence but oblique incidence for an ArF hyper-NA tool. We will perform a rigorous simulation in consideration of the above conditions. Hereby influence of the to the utmost resolution will be clarified by the rigorous simulation.
Recently, requirements concerning overlay accuracy have become much more restrictive. For the accurate overlay, signal intensity and wave form from the topographical alignment mark have been examined by signal simulation. However, even if the results were in good agreement with actual signal profiles, it would be difficult to select particular alignment marks at each mask level by the signal simulation. Therefore, many mark candidates are left in the kerf area after mass production. To facilitate the selection, we propose a mark TCAD system. It is a useful system for the mark selection with the signal simulation performed in advance. In our system, the alignment mark signal can be easily simulated after input of some process material parameters and process of record (POR). The POR is read into the system and a process simulator makes stacked films on a wafer. Topographical marks are simulated from the stacked films and the resist pattern. The topographical marks are illuminated and reflected beams are produced. Imaging of the reflected beams through inspection optics is simulated. In addition, we show two applications. This system is not only for predicting and showing a signal wave form, but is also helpful for finding the optimum marks.
We report a problem regarding DUV lithography on topographical substrates and a solution for obtaining desired CD control and resist pattern shape. In our experiment, large footings for a 250-nm resist pattern are observed when the resist pattern is transferred over a polysilicon step pattern of 175 nm in height. This pattern error is not negligible regarding device performance. The exposure tool used is a KrF scanner of NA 0.6. The resist is 500 nm thick with no antireflective coating (ARC). Computer simulation is used to demonstrate the amount of the footing. A nonrigorous diffraction model did not recreate the footing appearance at the poly-Si step. However, a rigorous diffraction model of incident light in a cone recreated the footing amount at the poly-Si step faithfully. In this simulation, optical distribution in the resist over the nonplanar wafer is solved by the finite-difference time-domain (FDTD) method. Optical intensity at the sidewalls of the step differs between the two models. Experimental results as well as simulation results show that larger coherency results in larger footing. In the case of a large coherency, the illumination rays come from various directions to the wafer, and a large shadow area is likely to appear behind the steep step. We also propose a shadow model for simple footing simulation. As a consequence, optical behavior in the vicinity at the steep step has a strong impact on the resist footing.
We have studied the lithography issue of resist footing in an ion implant layer after a gate conductor formation. In a previous report , we proposed the shadow model and showed a solution to reduce the resist footing. This paper reports on the further investigation into the cause and the reduction method of the resist footing over non-planar wafer with simulation and explains the effects with the shadow model. We analyzed the processes that affected the resist footing and four main effects were selected. These were NA, illumination coherency, mask bias, and mask type. We simulated these four effects on an orthogonal array by using the design of experiments (DOE). We obtained a better condition of higher NA, smaller coherency, positive mask bias, and Att-PSM for reducing the resist footing. We explain the reasons for these effective factors with the shadow model.
Recently the overlay accuracy has got seriously severe. For the accurate overlay, signal intensity and waveform from the topographical alignment mark has been examined by signal simulation. Actually these results have given good agreements with actual signal profiles, but it is difficult to select particular alignment marks in each mask level by the signal simulation. Even after mass production, many mark candidates leave in kerf area. To help the selection, we propose a mark TCAD system. It is a useful system for the mark selection with the signal simulation in advance. In our system, alignment mark signal can be very easily simulated after input of some process parameters and process of record (POR). The POR is read into the system and a process simulator makes stacked films on a wafer. Topographical marks are simulated from the stacked films and the resist pattern. The topographical marks are illuminated and reflected beams are produced. It is simulated how the reflected beams are imaged through inspection optics. We show two applications. This system is not only to predict and show a signal waveform, but also helpful to find optimum marks.
This paper reports a problem regarding DUV lithography on topographical substrate and solution for obtaining desired CD control and resist pattern shape. In our experiment, large footing for 250 nm resist pattern was observed when the resist pattern was transferred over polysilicon step pattern of 175nm in height. This pattern error is not negligible regarding device performance. The exposure tool used was a KrF scanner of NA0.6. Resist was 500 nm thick with no ARC. Computer simulation was used to demonstrate the amount of footing. A non-rigorous diffraction model did not recreate the footing appearance at the poly-Si step. However, a rigorous diffraction model of incident light in a cone recreated the footing amount at the poly-Si step faithfully. In this simulation, optical distribution in the resist over the nonplaner wafer was solved by the FDTD method. Optical intensity at sidewall of the step differs between the two models. Experimental results as well as simulation results showed that the amount of the footing depended on a coherency factor of illumination. Larger coherency resulted in larger footing. In the case of a large coherency the illumination rays come from various directions to the wafer, and a large shadow area is likely to appear behind the steep step. As a consequence, optical behavior in the vicinity at the steep step has a strong impact on the resist footing.
Standard simulations of optical projection systems for lithography with scalar or vector methods of Fourier optics make the assumption that the wafer stack consists of homogeneous layers. We introduce a general scheme for the rigorous electromagnetic field (EMF) simulation of lithographic exposures over non-planar wafers. Rigorous EMF simulations are performed with the finite-difference time-domain (FDTD) method. The described method is used to simulate several typical scenarios for lithographic exposures over non-planar wafers. This includes the exposure of resist lines over a poly-Si line on the wafer with orthogonal orientation, the simulation of “classical” notch problems, and the simulation of lithographic exposures over wafers with defects.
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