Dr. Levi D. Barnes Profile

Dr. Levi D. Barnes

R&D Engineer at Synopsys Inc

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Author

Publications (17)

Proceedings Article | 25 September 2010 Paper

Optical proximity correction challenges with highly elliptical contacts

Chris Cork, Levi Barnes, Yang Ping, Xiaohai Li, Stephen Jang

Proceedings Volume 7823, 78233R (2010) https://doi.org/10.1117/12.867247

KEYWORDS: Optical proximity correction, Photomasks, Calibration, Manufacturing, Semiconducting wafers, Tolerancing, Diffraction, Image processing, Critical dimension metrology, Immersion lithography

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The steady march of Moore's law demands ever smaller feature sizes to be printed and Optical Proximity Correction to correct to ever tighter dimensional tolerances. Recently pitch doubling techniques has relieved the pressure on CD reduction, which instead of being achieved lithographically are reduced by subsequent etching or chemical interaction with spin-on layers. CD tolerance reductions, however, still need to match the overall design rule shrinkage. The move to immersion lithography, where effective Numerical Apertures now reach 1.35, has been accompanied by a significantly reduction in depth of focus, especially on isolated contacts. To remedy this, RET techniques such as assist feature placement, have been implemented. Certain local placements of assist features and neighboring contacts are observed to result in highly elliptical contacts being printed. In some layouts small changes in the aspect ratio of the contact on the mask leads to strong changes in the aspect ratio of the printed contact, whereas in other layouts the response is very weak. This effect can be described as an aspect ratio MEEF. The latter type of contact can pose a significant challenge to the OPC recipe which is driven by the need to place the printed contour within a small range of distance from target points placed on the midpoint of edges of a nominally square contact. The OPC challenge naturally will be compounded when the target layout is rectangular in the opposite sense to the natural elliptical shape of the printed contact. Approaches to solving this can vary from intervening at the assist feature placement stage, at the possible loss of depth of focus, to accepting a certain degree of ellipticity in the final contour and making the OPC recipe concentrate on minimizing any residual errors. This paper investigates which contact layouts are most challenging, discusses the compromises associated with achieving the correction target and results are shown from a few different approaches to resolving these issues.

Proceedings Article | 4 March 2010 Paper

Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows

Myung-Soo Noh, Beom-Seok Seo, Suk-Joo Lee, Alex Miloslavsky, Christopher Cork, Levi Barnes, Kevin Lucas

Proceedings Volume 7640, 76400S (2010) https://doi.org/10.1117/12.848194

KEYWORDS: Double patterning technology, Optical lithography, Photomasks, Logic, Product engineering, Parallel processing, Electronics, 193nm lithography, Electronic design automation, Resolution enhancement technologies

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Proceedings Article | 30 September 2009 Paper

Parallel processing for pitch splitting decomposition

Levi Barnes, Yong Li, David Wadkins, Steve Biederman, Alex Miloslavsky, Chris Cork

Proceedings Volume 7488, 74882L (2009) https://doi.org/10.1117/12.831396

KEYWORDS: Double patterning technology, Parallel processing, Photomasks, Lithography, Neodymium, Etching, Optical lithography, Lithium, Immersion lithography, Semiconductor manufacturing

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SPIE Journal Paper | 1 July 2009

Double-patterning interactions with wafer processing, optical proximity correction, and physical design flows

Kevin Lucas, Christopher Cork, Alexander Miloslavsky, Gerard Luk-Pat, Levi Barnes, John Hapli, John Lewellen, Gregory Rollins, Vincent Wiaux, Staf Verhaegen

JM3, Vol. 8, Issue 03, 033002, (July 2009) https://doi.org/10.1117/12.10.1117/1.3158061

KEYWORDS: Semiconducting wafers, Double patterning technology, Lithography, Optical lithography, Etching, Photomasks, Optical proximity correction, Metals, Standards development, Critical dimension metrology

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Proceedings Article | 16 March 2009 Paper

Integrating assist feature print fixing with OPC

Levi Barnes, Amyn Poonawala, Benjamin Painter, Andrew Jost, TJ Takei, Yong Li

Proceedings Volume 7274, 727413 (2009) https://doi.org/10.1117/12.815171

KEYWORDS: Atrial fibrillation, Optical proximity correction, Printing, 3D modeling, Photomasks, Process modeling, Data modeling, Model-based design, Solids, Optical lithography

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Proceedings Article | 16 March 2009 Paper

Double-patterning-friendly OPC

Xiaohai Li, Gerry Luk-Pat, Chris Cork, Levi Barnes, Kevin Lucas

Proceedings Volume 7274, 727414 (2009) https://doi.org/10.1117/12.815175

KEYWORDS: Optical proximity correction, Photomasks, Etching, Optical lithography, Double patterning technology, Semiconducting wafers, Critical dimension metrology, Model-based design, Printing, Resolution enhancement technologies

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Proceedings Article | 13 March 2009 Paper

Large-scale double-patterning compliant layouts for DP engine and design rule development

Christopher Cork, Kevin Lucas, John Hapli, Herve Raffard, Levi Barnes

Proceedings Volume 7275, 72751K (2009) https://doi.org/10.1117/12.815213

KEYWORDS: Double patterning technology, Metals, Optical lithography, Optical proximity correction, Standards development, Photomasks, Neodymium, Lithium, Field emission displays, Extreme ultraviolet

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Double Patterning is seen as the prime technology to keep Moore's law on path while EUV technology is still maturing into production worthiness. As previously seen for alternating-Phase Shift Mask technology[1], layout compliance of double patterning is not trivial [2,3] and blind shrinks of anything but the most simplistic existing layouts, will not be directly suitable for double patterning. Evaluating a production worthy double patterning engine with highly non-compliant layouts would put unrealistic expectations on that engine and provide metrics with poor applicability for eventual large designs. The true production use-case would be for designs that have at least some significant double patterning compliance already enforced at the design stage. With this in mind a set of ASIC design blocks of different sizes and complexities were created that were double patterning compliant. To achieve this, a set of standard cells were generated, which individually and in isolation were double patterning compliant, for multiple layers simultaneously. This was done using the automated Standard Cell creation tool Cadabra^TM [4]. To create a full ASIC, however, additional constraints were added to make sure compliance would not be broken across the boundaries between standard cells when placed next to each other [5]. These standard cells were then used to create a variety of double patterning compliant ASICs using iCCompiler^TM to place the cells correctly. Now with a compliant layout, checks were made to see if the constraints made at the micro level really do ensure a fully compliant layout on the whole chip and if the coloring engine could cope with such large datasets. A production worthy double patterning engine is ideally distributable over multiple processors [6,7] so that fast turn-around time can be achievable on even the largest designs. We demonstrate the degree of linearity of scaling achievable with our double patterning engine. These results can be understood together with metrics such as the distribution of the sizes of networks requiring coloring resulting from these designs.

Proceedings Article | 17 October 2008 Paper

Assist feature aware double patterning decomposition

Christopher Cork, Levi Barnes, Gerard Luk-Pat

Proceedings Volume 7122, 712224 (2008) https://doi.org/10.1117/12.801562

KEYWORDS: Double patterning technology, Photomasks, Optical proximity correction, Lithography, Optical lithography, Cadmium, Tolerancing, Scanners, Critical dimension metrology, Etching

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Proceedings Article | 19 May 2008 Paper

Comparison of triple-patterning decomposition algorithms using aperiodic tiling patterns

Christopher Cork, Jean-Christophe Madre, Levi Barnes

Proceedings Volume 7028, 702839 (2008) https://doi.org/10.1117/12.793116

KEYWORDS: Optical lithography, Double patterning technology, Photomasks, Etching, Lithography, Electronic design automation, Extreme ultraviolet lithography, Metals, Printing, Manufacturing

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Proceedings Article | 19 May 2008 Paper

AF fixer: new incremental OPC method for optimizing assist feature

Sung-Gon Jung, Sang-Wook Kim, Sung-Soo Suh, Young-Chang Kim, Suk-Joo Lee, Sung-Woon Choi, Woo-Sung Han, Joo-Tae Moon, Levi Barnes, Xiaohai Li, Robert Lugg, Sooryong Lee, Kyoil Koo, Munhoe Do, Frank Amoroso, Benjamin Painter

Proceedings Volume 7028, 70280Y (2008) https://doi.org/10.1117/12.793040

KEYWORDS: Atrial fibrillation, Optical proximity correction, Printing, Photomasks, Manufacturing, Scanners, Image segmentation, Process modeling, Optical lithography, Data modeling

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Proceedings Article | 20 March 2008 Paper

Interactions of double patterning technology with wafer processing, OPC and design flows

Kevin Lucas, Chris Cork, Alex Miloslavsky, Gerry Luk-Pat, Levi Barnes, John Hapli, John Lewellen, Greg Rollins, Vincent Wiaux, Staf Verhaegen

Proceedings Volume 6924, 692403 (2008) https://doi.org/10.1117/12.778267

KEYWORDS: Semiconducting wafers, Optical lithography, Photomasks, Double patterning technology, Lithography, Etching, Metals, Optical proximity correction, 193nm lithography, Standards development

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Proceedings Article | 12 March 2008 Paper

Checking design conformance and optimizing manufacturability using automated double patterning decomposition

Chris Cork, Brian Ward, Levi Barnes, Ben Painter, Kevin Lucas, Gerry Luk-Pat, Vincent Wiaux, Staf Verhaegen, Mireille Maenhoudt

Proceedings Volume 6925, 69251Q (2008) https://doi.org/10.1117/12.774647

KEYWORDS: Double patterning technology, Manufacturing, Optical lithography, Photomasks, Logic, Optical proximity correction, Ultraviolet radiation, Lithography, Semiconducting wafers, Phase shifts

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Delays in equipment availability for both Extreme UV and High index immersion have led to a growing interest in double patterning as a suitable solution for the 22nm logic node. Double patterning involves decomposing a layout into two masking layers that are printed and etched separately so as to provide the intrinsic manufacturability of a previous lithography node with the pitch reduction of a more aggressive node. Most 2D designs cannot be blindly shrunk to run automatically on a double patterning process and so a set of guidelines for how to layout for this type of flow is needed by designers. While certain classes of layout can be clearly identified and avoided based on short range interactions, compliance issues can also extend over large areas of the design and are hard to recognize. This means certain design practices should be implemented to provide suitable breaks or performed with layout tools that are double patterning compliance aware. The most striking set of compliance errors result in layout on one of the masks that is at the minimum design space rather than the relaxed space intended. Another equally important class of compliance errors is that related to marginal printability, be it poor wafer overlap and/or poor process window (depth of focus, dose latitude, MEEF, overlay). When decomposing a layout the tool is often presented with multiple options for where to cut the design thereby defining an area of overlap between the different printed layers. While these overlap areas can have markedly different topologies (for instance the overlap may occur on a straight edge or at a right angled corner), quantifying the quality of a given overlap ensures that more robust decomposition solutions can be chosen over less robust solutions. Layouts which cannot be decomposed or which can only be decomposed with poor manufacturability need to be highlighted to the designer, ideally with indications on how best to resolve this issue. This paper uses an internally developed automated double pattern decomposition tool to investigate design compliance and describes a number of classes of non-conforming layout. Tool results then provide help to the designer to achieve robust design compliant layout.

Proceedings Article | 31 October 2007 Paper

Improvements in model-based assist feature placement algorithms

Benjamin Painter, Levi Barnes, Jeffrey Mayhew, Yongdong Wang

Proceedings Volume 6730, 67304Y (2007) https://doi.org/10.1117/12.746702

KEYWORDS: Model-based design, Atrial fibrillation, Optical proximity correction, Systems modeling, Image processing, Photomasks, Process modeling, System on a chip, Optical components, Image resolution

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Proceedings Article | 15 May 2007 Paper

Functionality and performance improvements with field-based OPC

Ben Painter, Kunal Taravade, Levi Barnes, Robert Lugg, Jeff Mayhew, Glenn Newell, Kevin Lucas

Proceedings Volume 6607, 66072T (2007) https://doi.org/10.1117/12.729012

KEYWORDS: Optical proximity correction, Model-based design, Resolution enhancement technologies, Atrial fibrillation, Image segmentation, Semiconducting wafers, Lithography, Tolerancing, Performance modeling, Computer simulations

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Proceedings Article | 21 June 2006 Paper

Assist feature placement analysis using focus sensitivity models

Lawrence Melvin, Jeffrey Mayhew, Benjamin Painter, Levi Barnes

Proceedings Volume 6281, 62810X (2006) https://doi.org/10.1117/12.692745

KEYWORDS: SRAF, Manufacturing, Process modeling, Performance modeling, Optical lithography, Semiconducting wafers, Image processing, Photomasks, Photoresist materials, Image segmentation

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Proceedings Article | 15 March 2006 Paper

Model-based placement and optimization of subresolution assist features

Levi Barnes, Benjamin Painter, Lawrence Melvin

Proceedings Volume 6154, 61542C (2006) https://doi.org/10.1117/12.656691

KEYWORDS: Model-based design, SRAF, Photomasks, Process modeling, Semiconducting wafers, Optical proximity correction, Optimization (mathematics), Lithography, Atrial fibrillation, Calibration

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Proceedings Article | 5 November 2005 Paper

Applying assist features to improve two dimensional feature process robustness

Lawrence Melvin III, Benjamin Painter, Levi Barnes

Proceedings Volume 5992, 59921N (2005) https://doi.org/10.1117/12.629395

KEYWORDS: SRAF, Manufacturing, Model-based design, Photomasks, Photoresist materials, Yield improvement, Reticles, Convolution, Semiconducting wafers, Image processing

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Showing 5 of 17 publications

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