KEYWORDS: Video, Receivers, Image segmentation, Principal component analysis, Super resolution, Image processing, Lawrencium, System on a chip, Volume rendering, Image quality
This paper presents a system for real-time video reception in low-power mobile devices using Digital Audio Broadcast
(DAB) technology for transmission. A demo receiver terminal is designed into a FPGA platform using the Advanced
Simple Profile (ASP) MPEG-4 standard for video decoding. In order to keep the demanding DAB requirements, the
bandwidth of the encoded sequence must be drastically reduced. In this sense, prior to the MPEG-4 coding stage, a pre-processing
stage is performed. It is firstly composed by a segmentation phase according to motion and texture based on
the Principal Component Analysis (PCA) of the input video sequence, and secondly by a down-sampling phase, which
depends on the segmentation results. As a result of the segmentation task, a set of texture and motion maps are obtained.
These motion and texture maps are also included into the bit-stream as user data side-information and are therefore
known to the receiver. For all bit-rates, the whole encoder/decoder system proposed in this paper exhibits higher image
visual quality than the alternative encoding/decoding method, assuming equal image sizes. A complete analysis of both
techniques has also been performed to provide the optimum motion and texture maps for the global system, which has
been finally validated for a variety of video sequences. Additionally, an optimal HW/SW partition for the MPEG-4
decoder has been studied and implemented over a Programmable Logic Device with an embedded ARM9 processor.
Simulation results show that a throughput of 15 QCIF frames per second can be achieved with low area and low power
implementation.
KEYWORDS: Video, Field programmable gate arrays, Telecommunications, Multimedia, Super resolution, Video compression, Computer programming, Computer simulations, Standards development, Control systems
In this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design
for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel
&mgr;C/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a
communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among
tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application
is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named
CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP)
MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project
and its main goal is the establishment of methodologies for the design of real-time complex digital systems using
Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.
Trends in multimedia consumer electronics, digital video and audio, aim to reach users through low-cost mobile devices connected to data broadcasting networks with limited bandwidth. An emergent broadcasting network is the digital audio broadcasting network (DAB) which provides CD quality audio transmission together with robustness and efficiency techniques to allow good quality reception in motion conditions. This paper focuses on the system-level evaluation of different architectural options to allow low bandwidth digital video reception over DAB, based on video compression techniques. Profiling and design space exploration techniques are applied over the ASP MPEG-4 decoder in order to find out the best HW/SW partition given the application and platform constraints. An innovative SystemC-based system-level design tool, called CASSE, is being used for modelling, exploration and evaluation of different ASP MPEG-4 decoder HW/SW partitions. System-level trade offs and quantitative data derived from this analysis are also presented in this work.
This paper addresses the enhancement of the spatial resolution of a
video sequence from a low resolution video sequence in real time.
The technique used, known as super-resolution reconstruction,
exploits the relative motion from frame to frame that produces
sub-pixel shifts. The algorithm, based on a previous version mapped
onto a video encoder architecture, is oriented towards a hardware
implementation and requires resources optimization. In order to
achieve a good resolution improvement, the motion estimation
algorithm must produce motion vectors as close to the real ones as
possible. At the same time, this motion estimation must match real
time requirements. Therefore, an exhaustive technique is applied in
combination with a simple segmentation of each frame for a motion
prediction refinement. Experimental results have been obtained for a
set of video sequences subjected to different motion
characteristics.
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