Integrated photonic computing promises revolutionary strides in processing power, energy efficiency, and speed, propelling us into an era of unprecedented computational capabilities. By harnessing the innate properties of light, such as high-speed propagation, inherent parallel processing capabilities, and the ability to carry vast amounts of information, photonic computing transcends the limitations of traditional electronic architectures. Furthermore, silicon photonic neural networks hold promise to transform artificial intelligence by enabling faster training and inference with significantly reduced power consumption. This potential leap in efficiency could revolutionize data centers, high-performance computing, and edge computing, minimizing environmental impact while expanding the boundaries of computational possibilities. The latest research on our silicon photonic platform for next-generation optical compute accelerators will be presented and discussed.
We present an avalanche photodetector (APD) behavioral modeling methodology for Silicon Photonics process design kit. The proposed APD behavioral model can describe nonlinearity of multiplication factors versus both bias voltage and input optical power, and it can also cover process-voltage-temperature (PVT) variations. Inside the APD model, built-in lookup tables that contain multiple coefficients are implemented, therefore nonlinear multiplication factor curves can be easily calculated with an automated coefficient setting algorithm which helps to streamline the verification process and reduce model parameter setting time without sacrificing accuracy. Specifically, as coefficients are derived from different PVT conditions, the proposed APD behavioral model has wide verification coverage.
We are developing a 1x8 single mode (SM) optical interface to facilitate the adoption of dense wavelength division multiplexing (DWDM) silicon photonic (SiPh) optical interconnects in exascale computing systems. A common method for fiber attachment to SiPh transceivers is ‘pigtailing’- the permanent adhesive bonding of fiber/v-groove arrays to onchip grating couplers (GC). This approach precludes standard high throughput surface mounting and solder reflow assembly of the transceiver onto system printed circuit boards. Our approach replaces the fixed pigtail with a low profile, small form factor, detachable expanded beam optical connector which consists of four essential parts: a GC array, a surface mount glass microlens array chip, an injection molded solder reflowable optical socket, and an injection molded SM light turn ferrule. The optical socket and ferrule are supplied by US Conec Ltd. To design the GC, we developed an optical simulator that considers CMOS foundry constraints in the optimization process. On-wafer measurements of the GC coupling loss to SMF28 fiber at 1310nm is ~1.4dB with a 1dB bandwidth of ~22nm. This ensures a wide low loss spectral window for at least 16 DWDM channels. The geometry of the optical system is arranged so that only a simple spherical lens is required for efficient mode matching in the expanded beam space. The fiber to fiber insertion loss through the light turn ferrule, two microlenses and GCs, and a looped back SOI waveguide ranged from 4.1-6.3dB, with insertion loss repeatability of 0.2dB after multiple mating cycles.
Optical interconnect is essential for massive data communication in rapidly developed data center and high-performance computing infrastructures. Large bandwidth, high energy efficiency and low latency are intrinsic advantages in optics. But they are also present R&D challenges under new requirements such as low total solution cost and reliable operation in harsh computing environment. Recently we have developed hybrid microring lasers on silicon to enable high integration density, compact chip size, and potentially volume and cost-effective production in a CMOS foundry. Novel structures such as thermal shunts and hybrid metal-oxide-semiconductor (MOS) capacitors were integrated into the laser cavity to allow over 100 oC cw operation and "zero-power" laser wavelength and power control. Special CMOS driver with equalization functionality for direct microring laser modulation with good signal integrality was also designed and fabricated in a 65 nm foundry process. For the first time, we integrated all these designs and chips together to demonstrate a 5-channel hybrid transmitter with 0.5 nm channel spacing and overall 70 Gb/s direct modulation rate. A novel direct photon lifetime modulation with much larger bandwidth than conventional injection current modulation by modulating bias on the MOS capacitor is demonstrated for the first time as well. Finally we review our on-going progress on migrating the similar design from a standard quantum well laser active region to a superior quantum-dot one for further improved temperature and dynamic performance.
Initially, we’ll discuss an SOI based, carrier injection micro-ring modulator. The static optical and electrical characteristics of this device will be reviewed and described. Thermal control and modulation mechanisms with pre-emphasis will be outlined. Automated wafer-lever optical/electrical results from volume foundries (Leti and STMicro) used for PDK/Verilog model development will be reviewed, along with experimental data on direct modulation to 25 Gb/s, crosstalk at various DWDM channel separations, and demonstrations with an external quantum-dot based comb laser with 80 and 50GHz channel spacing.
Following this, our work on directly modulated hybrid quantum-well ring lasers will be reviewed in design, fabrication. Experimental results for modulation at 12.5 Gb/s/channel, integration with MOS capacitor for wavelength control and modulation and a thermal shunt for temperature management will highlight the advantages of this technology that may be exploited. Subsequently, our work on hybrid quantum-dot based comb lasers for on-chip DWDM sources will be discussed in their details of physical operation, demonstrating successful mode-locking and noise-free operation across the 20-80C thermal range. Our work on the integration of on-chip APDs from a CMOS-compatible processes will also be reviewed, demonstrating error-free operation at 12.5 Gb/s and 25 Gb/s with a sensitivity of -26dBm and -16dBm, respectively. The use of APDs will drastically decrease the overall power consumption of the interconnect, lowering total cost of ownership. Finally, our most recent progress on integration of the silicon photonics with CMOS by a flip-chip will be reviewed showing high-speed modulation and thermal control for a multi-channel DWDM transceiver.
Recent trends show an explosion in the amount of data being created each year. In response to this trend new system architectures optimized for data-centric workloads are being developed. These architectures can only be brought to fruition by developing new technologies to transmit, compute, and store data. My talk will focus on the impact of photonics, and silicon photonics in particular, on these trends and discuss the work being done at HPE labs to advance these technologies
Increased data rates have motivated the investigation of advanced modulation schemes, such as four-level pulseamplitude modulation (PAM4), in optical interconnect systems in order to enable longer transmission distances and operation with reduced circuit bandwidth relative to non-return-to-zero (NRZ) modulation. Employing this modulation scheme in interconnect architectures based on high-Q silicon photonic microring resonator devices, which occupy small area and allow for inherent wavelength-division multiplexing (WDM), offers a promising solution to address the dramatic increase in datacenter and high-performance computing system I/O bandwidth demands. Two ring modulator device structures are proposed for PAM4 modulation, including a single phase shifter segment device driven with a multi-level PAM4 transmitter and a two-segment device driven by two simple NRZ (MSB/LSB) transmitters. Transmitter circuits which utilize segmented pulsed-cascode high swing output stages are presented for both device structures. Output stage segmentation is utilized in the single-segment device design for PAM4 voltage level control, while in the two-segment design it is used for both independent MSB/LSB voltage levels and impedance control for output eye skew compensation. The 65nm CMOS transmitters supply a 4.4Vppd output swing for 40Gb/s operation when driving depletion-mode microring modulators implemented in a 130nm SOI process, with the single- and two-segment designs achieving 3.04 and 4.38mW/Gb/s, respectively. A PAM4 optical receiver front-end is also described which employs a large input-stage feedback resistor transimpedance amplifier (TIA) cascaded with an adaptively-tuned continuous-time linear equalizer (CTLE) for improved sensitivity. Receiver linearity, critical in PAM4 systems, is achieved with a peak-detector-based automatic gain control (AGC) loop.
We report a 200 mm silicon photonic platform integrating a set of devices dedicated on HPC applications. PiN microring modulator layout and process are optimized together. Active tuning through heating section is investigated using either doped silicon or metal resistors. This technology is supported by a dedicated process design kit (PDK) compatible with conventional CMOS EDA tools. The PDK includes optical device models that will be described and compared with experimental results. A focus will be done on the PiN micro-ring modulator models which covering a wide range of geometries. DC mode and RF behaviors are supported.
Interconnect architectures based on high-Q silicon photonic microring resonator devices offer a promising solution to
address the dramatic increase in datacenter I/O bandwidth demands due to their ability to realize wavelength-division
multiplexing (WDM) in a compact and energy efficient manner. However, challenges exist in realizing efficient
receivers for these systems due to varying per-channel link budgets, sensitivity requirements, and ring resonance
wavelength shifts. This paper reports on adaptive optical receiver design techniques which address these issues and have
been demonstrated in two hybrid-integrated prototypes based on microring drop filters and waveguide photodetectors
implemented in a 130nm SOI process and high-speed optical front-ends designed in 65nm CMOS. A 10Gb/s powerscalable
architecture employs supply voltage scaling of a three inverter-stage transimpedance amplifier (TIA) that is
adapted with an eye-monitor control loop to yield the necessary sensitivity for a given channel. As reduction of TIA
input-referred noise is more critical at higher data rates, a 25Gb/s design utilizes a large input-stage feedback resistor
TIA cascaded with a continuous-time linear equalizer (CTLE) that compensates for the increased input pole. When
tested with a waveguide Ge PD with 0.45A/W responsivity, this topology achieves 25Gb/s operation with -8.2dBm
sensitivity at a BER=10-12. In order to address microring drop filters sensitivity to fabrication tolerances and thermal
variations, efficient wavelength-stabilization control loops are necessary. A peak-power-based monitoring loop which
locks the drop filter to the input wavelength, while achieving compatibility with the high-speed TIA offset-correction
feedback loop is implemented with a 0.7nm tuning range at 43μW/GHz efficiency.
The evolution of computing infrastructure and workloads has put an enormous pressure on datacenter networks. It is
expected that bandwidth will scale without increases in the network power envelope and total cost of ownership.
Networks based on silicon photonic devices promise to help alleviate these problems, but a viable development path for
these technologies is not yet fully outlined. In this paper, we report our progress on developing components and
strategies for datacenter silicon photonics networks. We will focus on recent progress on compact, low-threshold hybrid
Si lasers and the CWDM transceivers based on these lasers as well as DWDM microring resonator-based transceivers.
Hybrid silicon platform provides a solution to integrate active components (lasers, amplifiers, photodetectors, etc.) with
passive ones on the same silicon substrate, which can be used for building an optical interconnect system. Owing to the
advantages in footprint, power consumption, and high-speed modulation, hybrid silicon microring lasers have been
demonstrated as a potential candidate for on-chip silicon light source. In this paper we review the progress to improve
the performance of recently demonstrated compact microring lasers with ring diameter of 50 μm. A simple approach to
enhance optical mode and electron-hole recombination, which results in threshold reduction and efficiency improvement
is developed. This is done by appropriately undercutting the multiple quantum well (MQW) region to force carriers to
flow towards the outer edge of the microring for better gain/optical mode overlap. We observe a reduction of the
threshold of over 20% and up to 80% output power enhancement. The model and the experimental results highlight the
benefits, as well as the negative effects from excessive undercutting, including lower MQW confinement, higher modal
loss and higher thermal impedance. A design rule for MQW undercutting is therefore provided. Application as on-chip
optical interconnects is discussed from a system perspective.
We present DWDM nanophotonics architectures based on microring resonator modulators and detectors. We
focus on two implementations: an on chip interconnect for multicore processor (Corona) and a high radix network
switch (HyperX). Based on the requirements of these applications we discuss the key constraints on the photonic
circuits' devices and fabrication techniques as well as strategies to improve their performance.
We have devised and fabricated high-speed silicon-on-insulator resonant microring photodiodes. The detectors comprise a p-i-n junction across a silicon rib waveguide microring resonator. Light absorption at 1550 nm is enhanced by implanting the diode intrinsic region with boron ions at 350 keV with a dosage of 1 × 1013 cm−2. We have measured 3-dB bandwidths of 2.4 and 3.5 GHz at 5 and 15 V reverse bias, respectively, and observed an open-eye diagram at 5 gigabit/s with 5 V bias.
In this paper we review the recent progress in developing compact microring lasers on the hybrid silicon platform.
A simplified self-aligned process is used to fabricate devices as small as 15 μm in diameter. The optically-pumped,
continuous wave (cw) devices show low threshold carrier density, comparable to the carrier density to reach material
transparency. In the electrically-pumped lasers, the short cavity length leads to the minimum laser threshold less than 5
mA in cw operation. The maximum cw lasing temperature is up to 65 °C. Detailed studies in threshold as a function of
coupling coefficient and bus waveguide width are presented. Surface recombination at the dry-etched exposed interface
is investigated qualitatively by studying the current-voltage characteristics. Ring resonator-based figures of merits
including good spectral purity and large side-mode suppression ratio are demonstrated. Thermal impedance data is
extracted from temperature-dependent spectral measurement, and buried oxide layer in silicon-on-insulator wafer is
identified as the major thermal barrier to cause high thermal impedance for small-size devices. The demonstrated
compact hybrid ring lasers have low power consumption, small footprint and dynamic performance. They are promising
for Si-based optical interconnects and flip-flop applications.
A compact electrically-pumped hybrid silicon microring laser is realized on a hybrid silicon platform. A simplified, selfaligned,
deep-etch process is developed to result in low-loss resonator with a high quality factor Q>15,000. Small
footprint (resonator diameter=50 μm), electrical and optical losses all contribute to lasing threshold as low as 5.4 mA and
up to 65 °C operation temperature in continuous-wave (cw) mode. Outcoupling- and bus waveguide width-dependent
studies are conducted for optimizing device structure. A simple qualitative study in current-voltage (IV) characteristic
shows that dry etching through active region leads to <3× more leakage current at the same reverse bias than wet etch
counterpart. It indicates a relatively good interface with tolerable surface recombination from deep dry etch. The
spectrum is single mode with large extinction ratio (>40 dB) and small linewidth (<0.04 nm) observed. The unique
bistability operation in ring resonator structure is also demonstrated.
We present a novel quantum communication protocol for "Private Data Sampling", where a player (Bob) obtains
a random sample of limited size of a classical database, while the database owner (Alice) remains oblivious as
to which bits were accessed. The protocol is efficient in the sense that the communication complexity per query
scales at most linearly with the size of the database. It does not violate Lo's "no-go" theorem for one-sided twoparty
secure computation, since a given joint input by Alice and Bob can result in randomly different protocol
outcomes. After outlining the main security features of the protocol, we present our first experimental results.
High-channel-count WDM will eventually be used for short reach optical interconnects since it maximizes link bandwidth and efficiency. An impediment to adoption is the fact that each WDM wavelength currently requires its own DFB laser. The alternative is a single, multi-wavelength laser, but noise, size and/or expense make existing options impractical. In contrast, a new low-noise, diode comb laser based on InAs/GaAs quantum dots provides a practical and timely alternative, albeit in the O-band. Samples are being evaluated in short reach WDM development systems. Tests show this type of Fabry-Perot laser permits >10 Gb/s error-free modulation of 10 to over 50 separate channels, as well as potential for 1.25 Gb/s direct modulation. The paper describes comb laser requirements, noise measurements for external and direct modulation, O-band issues, transmitter photonic circuitry and components, future CMP applications, and optical couplers that may help drive down packaging costs to below a dollar.
We present an unconditionally secure Oblivious Transfer protocol relying on two rounds of entanglement-free
quantum communication. When played honestly, the protocol only requires the ability to measure a single qubit
in a fixed basis, and to perform a coherent bit-flip (Pauli X) operation. We present a generalization to a "Private
Data Sampling" protocol, where a player (Bob) can obtain a random sample of fixed size from a classical database
of size N, while the database owner (Alice) remains oblivious as to which bits were accessed. The protocol is
efficient in the sense that the communication complexity per query scales at most linearly with the size of the
database. It does not violate Lo's "no-go" theorem for one-sided two-party secure computation, since a given
joint input by Alice and Bob can result in randomly different protocol outcomes. Finally it could be used to
implement a practical bit string commitment protocol, among other applications.
We present two experiments geared toward the realization of a robust and intense source of polarization-entangled
photons. First, we describe a novel source of polarization-entangled pairs that uses periodically-poled potassium
titanyl phosphate (PPKTP) and an interferometer based on polarization beam displacers. The source emits an
intense flux of high-quality single-mode entangled photons and is stable, robust, and easy to align. Second, we
report on sources of correlated photons generated in PPKTP waveguides. Waveguide sources of correlated pairs
have been shown to generate high fluxes of pairs: we theoretically and experimentally investigate spontaneous
parametric down-conversion generation of photon pairs in waveguides at different wavelengths.
Moore's Law has set great expectations that the performance/price ratio of commercially available semiconductor
devices will continue to improve exponentially at least until the end of the next decade. Although the physics
of nanoscale silicon transistors alone would allow these expectations to be met, the physics of the metal wires
that connect these transistors will soon place stringent limits on the performance of integrated circuits. We
will describe a Si-compatible global interconnect architecture - based on chip-scale optical wavelength division
multiplexing - that could precipitate an "optical Moore's Law" and allow exponential performance gains until
the transistors themselves become the bottleneck. Based on similar fabrication techniques and technologies, we
will also present an approach to an optically-coupled quantum information processor for computation beyond
Moore's Law, encouraging the development of practical applications of quantum information technology for
commercial utilization. We present recent results demonstrating coherent population trapping in single N-V
diamond color centers as an important first step in this direction.
We report on two experiments implementing quantum communications primitives in linear optics systems: a
secure Quantum Random Bit Generator (QRBG) and a multi-qubit gate based on Two-Photon Multiple-Qubit
(TPMQ) quantum logic. In the first we use photons to generate random numbers and introduce and implement
a physics-based estimation of the sequence randomness as opposed to the commonly used statistical tests. This
scheme allows one to detect and neutralize attempts to eavesdrop or influence the random number sequence. We
also demonstrate a C-SWAP gate that can be used to implement quantum signature and fingerprinting protocols.
A source of momentum-entangled photons, remote state preparation, and a C-SWAP gate are the ingredients
used for this proof-of-principle experiment. While this implementation cannot be used in field applications due to the limitations of TPMQ logic, it provides useful insights into this protocol.
We describe how a quantum non-demolition device based on electromagnetically-induced transparency in solidstate atom-like systems could be realized. Such a resource, requiring only weak optical nonlinearities, could potentially enable photonic quantum information processing (QIP) that is much more efficient than QIP based on linear optics alone. As an example, we show how a parity gate could be constructed. A particularly interesting physical system for constructing devices is the nitrogen-vacancy defect in diamond, but the excited-state structure for this system is unclear in the existing literature. We include some of our latest spectroscopic results that indicate that the optical transitions are generally not spin-preserving, even at zero magnetic field, which allows the realization of a Λ-type system.
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