A high-precision and low-power miniaturized digital sun sensor has been developed at TNO. The single-chip sun sensor comprises an application specific integrated circuit (ASIC) on which an active pixel sensor (APS), read-out and processing circuitry as well as communication circuitry are combined. The design was optimized for low recurrent cost. The sensor is albedo insensitive and the prototype combines an accuracy in the order of 0.03° with a mass of just 72 g and a power consumption of only 65 mW.
What started as an academic development in frame of the Dutch MicroNed program five years ago should culminate in the introduction of the smallest digital sunsensor available in (and probably outside) of Europe at the ICSO. At the ICSO, TNO plans to show for the first time a working mini-DSS, based on the APS+ chip. The sunsensor has been optimized for low power, low recurring costs and high repeatability in production. In order to achieve this, several innovations have been included and verified in a diverse range of supporting programs. During the presentation, trades performed that lead to the current setup, as well as the properties of the sensor system and interfaces will be discussed.
A micro-digital sun sensor (μDSS) is a sun detector which senses a satellite’s instant attitude angle with respect to the sun. The core of this sensor is a system-on-chip imaging chip which is referred to as APS+. The APS+ integrates a CMOS active pixel sensor (APS) array of 368×368 pixels , a 12-bit analog-to-digital converter, and digital signal processing circuits. The μDSS is designed particularly for microsatellite applications, thus low power consumption is the major design consideration. The APS+ reduces power consumption mainly with profiling and windowing methods which are facilitated by the specific active-pixel design. A prototype of the APS+ which is designed in a standard 0.18-μm CMOS process is presented. The APS+ consumes 21 mW at 10 fps, which is 10 times less than the state of the art. In order to improve noise performance, a reset noise reduction method, quadruple sampling (QS), is implemented. QS reduces the effect of the reset noise compared to the conventional delta double sampling method, even in a 3-transistor active pixel structure. The APS+ obtains an accuracy of 0.01 deg with the QS method.
In space applications, sensors work in very harsh space environment. Thus the reliability design must be carefully considered. This paper addresses the techniques which effectively
increase the reliability of CMOS image sensors. A radiation tolerant pixel design which is
implemented in a sun tracker sensor is presented. Measurement results of total dose radiation,
SEL, SEU, etc prove the radiation immunity of the sensor.
Micro-Digital Sun Sensor (μDSS) is a sun detector which senses the respective angle between a satellite and the sun.
It is composed of a solar cell power supply, a RF communication block and a CMOS Image Sensor (CIS) chip,
which is called APS+. The paper describes the implementation of a prototype of the μDSS APS+ processed in a
standard 0.18μm CMOS process. The μDSS is applied for micro or nano satellites. Power consumption is a very
rigid specification in this kind of application, thus the APS+ is optimized for low power consumption. This character
is realized by a specific pixel design which implements profiling and windowing during the detection process. The
profiling is completely fast and power efficiently by a "Winner Take ALL (WTA)" principle. The measurement results shows that the APS+ achieves a reduction of power consumption by more than a factor 10 compared to state of-the-art. Besides the low power consumption, the APS+ also proposes a quadruple sampling method which improves thermal noise with 3-T Active Pixel image Sensor (APS) structure.
It is generally known that active pixel sensors (APS) have a number of advantages over CCD detectors if it comes to cost
for mass production, power consumption and ease of integration. Nevertheless, most space applications still use CCD
detectors because they tend to give better performance and have a successful heritage. To this respect a change may be at
hand with the advent of deep sub-micron processed APS imagers (< 0.25-micron feature size). Measurements performed
on test structures at the University of Delft have shown that the imagers are very radiation tolerant even if made in a
standard process without the use of special design rules. Furthermore it was shown that the 1/f noise associated with deep
sub-micron imagers is reduced as compared to previous generations APS imagers due to the improved quality of the gate
oxides. Considering that end of life performance will have to be guaranteed, limited budget for adding shielding metal
will be available for most applications and lower power operations is always seen as a positive characteristic in space
applications, deep sub-micron APS imagers seem to have a number of advantages over CCD's that will probably cause
them to replace CCD's in those applications where radiation tolerance and low power operation are important
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