The use of III-V and group IV compounds in the same heterostructure is of great interest for high performances solar cells under concentration. In fact, the combination of these III-V and group IV compounds can lead to interesting strategic bandgap choices and engineering to better match the absorption of the solar spectrum, and therefore better solar cell performance. The series-connected quad-junctions (4J) solar cell strategies have the potential to improve solar cells performance and therefore enable low-cost concentrator photovoltaic (CPV) systems, allowing lower levelized cost of electricity (LCOE) from a CPV system. This work presents the investigation of the performance of dual junction (2J) GaInP/GaAs that might be implemented as upper cells with group IV (SiGeSn) cells as bottom cells. The aim of this study is to validate the epitaxial structure and the fabrication process for future 4J cells development. Pitch is varied from 125 μm to 400 μm for two different size of cells, in order to optimize solar cells performance under concentration (X) In the range of 100X to 1000X. Solar cells demonstrated high fill factor (FF) values and ideality factors (n) approaching unity per subcell have been obtained in the range of 100X to 500X. A FF of 85% and 88% are obtained at a concentration of 1000X for the bigger and smaller cells respectively, for the narrowest pitch. These results close to the state-of-the-art are encouraging for the implementation of this 2J with IV bottom subcell for the purpose of high performance 4J.
KEYWORDS: Silicon, Germanium, Interfaces, Multijunction solar cells, Photovoltaics, Electrochemical etching, Transmission electron microscopy, Chemical mechanical planarization, Solar cells
III-V solar cell cost reduction and direct III-V/Si integration can both be realized by depositing a thin layer of high-quality Ge on relatively low-cost Si substrates. However, direct epitaxial growth of Ge on Si substrates is difficult due to the 4% lattice mismatch between the film and the substrate. Threading dislocations (TDs) introduced within the Ge layer have a detrimental effect on device performances. The goal of this research is to address the perennial need to minimize the defect density of Ge epilayers grown on a Si substrate. We seek to accommodate the effects of the lattice mismatch by introducing a porous Si interface layer to intercept dislocations and prevent them from reaching the active layers of the device. The porous Si layer is formed through dislocation-selective electrochemical deep etching and thermal annealing. The porous layer created beneath the top Ge layer can both act as dislocation traps and as a soft compliant substrate, which displays high flexibility. Transmission electron microscopy (TEM) analysis of the Ge/porous Si interface shows that the lattice mismatch strain of the Ge films was almost relaxed. The surface roughness of this modified Ge/Si substrate has been reduced using chemical mechanical polishing (CMP) process to fulfil the requirements for epitaxy of III-V alloys. Finally, we present simulation results exploring the effect of threading dislocations on device performance.
Four-junction solar cells for space and terrestrial applications require a junction with a band gap of ∼1 eV for optimal performance. InGaAsN or InGaAsN(Sb) dilute nitride junctions have been demonstrated for this purpose, but in achieving the 14 mA/cm2 short-circuit current needed to match typical GaInP and GaAs junctions, the open-circuit voltage (VOC) and fill factor of these junctions are compromised. In multijunction devices incorporating materials with short diffusion lengths, we study the use of thin junctions to minimize sensitivity to varying material quality and ensure adequate transmission into lower junctions. An n-i-p device with 0.65-μm absorber thickness has sufficient short-circuit current, however, it relies less heavily on field-aided collection than a device with a 1-μm absorber. Our standard cell fabrication process, which includes a rapid thermal anneal of the contacts, yields a significant improvement in diffusion length and device performance. By optimizing a four-junction cell around a smaller 1-sun short-circuit current of 12.5 mA/cm2, we produced an InGaAsN(Sb) junction with open-circuit voltage of 0.44 V at 1000 suns (1 sun=100 mW/cm2), diode ideality factor of 1.4, and sufficient light transmission to allow >12.5 mA/cm2 in all four subcells.
A monolithic compound semiconductor phototransducer optimized for narrow-band light sources was designed for and has achieved conversion efficiencies exceeding 50%. The III-V heterostructure was grown by MOCVD, based on the vertical stacking of a number of partially absorbing GaAs n/p junctions connected in series with tunnel junctions. The thicknesses of the p-type base layers of the diodes were engineered for optimal absorption and current matching for an optical input with wavelengths centered in the 830 nm to 850 nm range. The device architecture allows for improved open-circuit voltage in the individual base segments due to efficient carrier extraction while simultaneously maintaining a complete absorption of the input photons with no need for complicated fabrication processes or reflecting layers. Progress for device outputs achieving in excess of 12 V is reviewed in this study.
PV devices with active areas of ~3:4 mm2 were fabricated and tested with top electrodes having different emitter gridline spacings with active area shadowing values between 0% and 1.8%. As expected, the thicker n/p junctions exhibit hindered photocarrier extraction, with low fill factor (FF) values, for devices prepared with sparse gridline designs. However, this study clearly demonstrates that for thin n/p junctions photocarrier extraction can still be efficient (FF > 80%) even for devices with no gridlines, which we explain using a TCAD model. The electric field profiles of devices with and without hindered photocarrier extraction are also discussed.
This work reports on a chemical beam epitaxy growth study of InGaAs/GaAs quantum dots (QDs) engineered using an in-situ indium-flush technique. The emission energy of these structures has been selectively tuned over 225 meV by varying the dot height from 7 to 2 nm. A blueshift of the photoluminescence (PL) emission peak and a decrease of the intersublevel spacing energy are observed when the dot height is reduced. Numerical investigations of the influence of dot structural parameters on their electronic structure have been carried out by solving the single-particle one-band effective mass Schrödinger equation in cylindrical coordinates, for lens-shaped QDs. The correlation between numerical calculations and PL results is used to better describe the influence of the In-flush technique on both the dot height and the dot composition.
The high-efficiency conversion of photonic power into electrical power is of broad-range applicability to many industries due to its electrical isolation from the surrounding environment and immunity to electromagnetic interference which affects the performance and reliability of sensitive electronics. A photonic power converter, or phototransducer, can absorb several watts of infrared laser power transmitted through a multimode fiber and convert this to electrical power for remote use. To convert this power into a useful voltage, we have designed, simulated, and fabricated a photovoltaic phototransducer that generates >5 V using a monolithic, lattice-matched, vertically-stacked, single-cell device that eliminates complex fabrication and assembly steps. Experimental measurements have demonstrated a conversion efficiency of up to 60.1% under illumination of ~11 W/cm2 at a wavelength of 835 nm, while simulations indicate that efficiencies reaching 70% should be realistically achievable using this novel design.
KEYWORDS: Solar cells, Receivers, Sun, Solar concentrators, Multijunction solar cells, Calibration, Temperature metrology, Computer simulations, Copper, Device simulation
The thermal performances of multi-junction solar cells, mounted on receivers, are studied to determine the change in
device efficiency with respect to sunlight concentration under continuous illumination. Experimental characterization of
the device was performed by measuring the solar cell current-voltage curve using both flash and continuous-illumination
solar simulators. We are able to extract the change in efficiency and open circuit voltage with respect to the change in
concentration from experiments with respect to the application of thermal paste between the receiver and the heat
exchange. We show the efficiency linearly decrease at a rate of -0.0094%/°C (no paste) and -0.0043%/°C (paste). We
used the calibrated numerical model to determine the solar cell temperature and incorporate the corresponding efficiency
when scaled up to 2000 sun concentrations under continuous illumination.
KEYWORDS: Resistance, Solar cells, Oscilloscopes, Multijunction solar cells, Time metrology, Doping, Remote sensing, Power supplies, Calibration, Germanium
The current density-voltage characteristic of an AlGaAs/AlGaAs tunnel junction is determined by taking a time-averaged
measurement across the device. A tunnelling peak of ~950A/cm2 is recorded by this method. Measurements of the
tunnelling peak and valley currents by the time averaging method are obscured due to the unstable nature of the negative
differential resistance region of the current density-voltage characteristic. This AlGaAs/AlGaAs tunnel junction is then
biased inside the negative differential resistance region of the current density-voltage characteristic, causing the current
and the voltage to oscillate between the peak and the valley. The current and voltage oscillations are measured over time
and then currents and voltages corresponding to the same time stamps are plotted against each other to form a timedependent
curve from which a tunnelling peak of a value larger than 1100A/cm2 is determined. The peak determined by
this method is 11-20% larger than previously determined using the time averaged measurement. An AlGaAs/InGaP
tunnel junction having no negative differential resistance region is also presented.
Triple-junction AlGaInP/InGaAs/Ge solar cells with embedded InAs quantum dots are presented, where typical
samples obtain efficiencies of > 40% under AM1.5D illumination, over a range of concentrations of 2- to 800-suns
(2 kW/m2 to 800 kW/m2). Quantum efficiency measurements show that the embedded quantum dots improve the
absorption of the middle subcell in the wavelength range of 900-940 nm, which in turn increases the overall
operating current of the solar cell. These results are obtained with 1 cm2 solar cells, and they demonstrate the
solar cells' low series resistance, which and makes them ideal for the current generation in commercial
concentrator systems. The thermal management and reliability of the solar cell and carrier is demonstrated by
testing the experimental samples under flash (up to 1000-suns) solar simulator and continuous (up to 800-suns)
solar simulator. Under continuous solar illumination, the solar cell temperature varies between ~Δ3°C at 260-suns
linearly to ~Δ33°C at 784-suns when the solar cell is mounted with thermal paste, and ~Δ27°C at 264-suns linearly
to ~Δ91°C at 785-suns when no thermal paste is used. The solar cells experience the expected shift in open circuit
voltage and efficiency due to temperature, but otherwise operate normally for extended periods of time.
The surface temperature distribution of a GaAs wafer, heated under vacuum, has been measured using a
digital camera. A method is proposed to remove parasitic signals from the image. The accuracy of the thermal
image is validated by comparing the results with a separate measurement from absorption band-edge spectroscopy
(ABES). The thermal imaging data are observed to be within the experimental error from the ABES technique
for the entire surface of the wafer. We observe a radial temperature profile with a center-to-edge difference that
varies as a function of the central temperature. A difference of 25 °C is observed for a central temperature of
565 °C. This difference increases with the wafer temperature, confirming that it is due to a net heat flux escaping
the wafer by its edge, which is in contact with a graphite holder. Based on these results, a solution is proposed
in which the graphite wafer holder is replaced by a ceramic version.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.