The current Cr etch solutions will need to be improved to keep up with market demand for smaller features and reticle
resolution while the industry awaits the maturity of EUV technology, and based on the current roadmap, there is an urgency
to improve the Cr reticle pattern resolution capability today. That resolution capability comes in the form of writing
smaller features on a photomask, but as the Cr-to-photoresist (PR) ratio increases beyond three to one, there is a negative
impact on the integrity of the PR, resulting in costly product scrap. Thinner PR layers are required to avoid such scrap,
since the Cr layer is fixed. This necessitates lower consumption of the PR during the etch process, and that translates to
higher etch selectivity of Cr to PR. This manuscript covers the ideas selected to address reduction in PR loss, the
experiments around a few of those ideas, and the results of those experiments. Our experimental set shows that a <25%
increase in selectivity and a 40-50% reduction in over-etch can be achieved through increased ion/neutral control during
the etch process. This, combined with resist pretreatments or other Cr etch modifications, could prove to be a solution in
the interim, but while the initial results are promising, further investigation is needed on production nodes to realize the
full impact of this achievement.
Deep Reactive Ion Etching (DRIE) has revolutionized a wide variety of MEMS applications since its inception nearly
two decades ago. The DRIE technology has been largely responsible for allowing lab scale technology demonstrations to
become manufacturable and profitable consumer products. As applications which utilize DRIE technologies continue to
expand and evolve, they continue to spawn a range of new requirements and open up exciting opportunities for
advancement of DRIE. This paper will examine a number of current and emerging DRIE applications including
nanotechnology, and DRIE related packaging technologies such as Through Silicon Via (TSV) and plasma dicing. The
paper will discuss a number of technical challenges and solutions associated with these applications including: feature
profile control at high aspect ratios, causes and elimination of feature tilt/skew, process options for fragile device
structures, and problems associated with through substrate etching. The paper will close with a short discussion around
the challenges of implementing DRIE in production environments as well as looking at potentially disruptive
enhancements / substitutions for DRIE.
The fabrication of 3D high aspect ratio structures with positively sloped profiles has found extensive
applications both in the front-end and in the back-end semiconductor manufacturing. Often, high etch rates
are required and plasma etching processes with F-based chemistries need to be employed. However, plasma
etching of silicon in F-based chemistries generally results in so-called "cusping" due to its isotropic nature.
Of particular interest are the etch profiles with slope angles in the range of 50-80o and without "cusping" at
the top portion of etched structures. For 3D packaging applications, for example, even small cusping could
degrade the step-coverage of diffusion barrier layer and metal seed layer and cause void formation in
subsequent metal filling processes.
At Oerlikon USA Inc., a proprietary process scheme has been developed to etch deep and positively sloped
silicon structures (vias, trenches, etc.) at high etch rates while eliminating cusping with precise profile
control. The new process scheme employs main plasma etch steps using gas mixtures and deposition pulse
steps. And the deposition pulses intermittently punctuate the main etch steps. Using standard gases, such as
SF6 and C4F8, sloped Si trenches with slope angle of ~60o are etched in both 6" and 8" wafers, at etch rates
of ~7.0 (micron)m/min. Etch selectivity to photoresist mask materials exceeds 100:1. The process scheme and
underlying mechanism will be presented in this work.
The ITRS roadmap indicates that significant improvements in photomask processing will be necessary to achieve the design goals of 45nm technology node masks. In the past, etch systems were designed to produce an etch signature that was as "flat" as possible to avoid introducing undesirable signatures in the final product. However, as error budgets are shrinking for all tools in the process line, the signatures produced by etch systems are used to compensate for some of the upstream CD issues. Process modifications have been used successfully in this fashion, but frequently process adjustment alone is not sufficient.
CD uniformity results from a complex interaction between the system and the sample. An etch system must be capable of adjusting radial, linear, and loading etch uniformity components to compensate for the specific needs of each sample. The adjustments should also be as independent of process as possible. Towards this end, experiments were conducted with various etch technologies to create specific, controllable etch signatures on demand without the need for hardware changes. CD data collected from binary chrome photomasks was used to verify performance of the uniformity adjustment technologies.
In any plasma etch process, there are slight variations in the output of generators, mass
flows, and pressure control systems that may sometimes contribute to run-to-run
differences in the final product. Even excluding material differences, endpoint times can
vary somewhat, requiring an accurate endpoint system to stop processing at the
appropriate time. The most widely accepted systems for plasma endpoint detection are
based on optical emission spectroscopy (OES). OES-based endpoint systems analyze the
visible and near-visible electromagnetic radiation emitted by the plasma in order to detect
subtle changes that occur when a film has been completely etched. A signal can be
constructed from this data and used to stop or otherwise modify the process.
Other methods exist for detecting endpoint. Laser reflectance is well known to
photomask etch engineers, but there are also lesser known methods that depend on
detecting changes in pressure, DC bias, or match network positions.
Each system has its own unique set of strengths and weaknesses. While all of these
systems are quite capable of detecting endpoint under normal circumstances, the
requirements of low load photomask etching are extremely demanding. Therefore, a
need exists to enhance endpoint detection on low load photomasks. Our proposed
method is a multi-sensor system that includes measurements of several process
parameters in addition to emission spectra to generate an endpoint signal that is more
robust than an endpoint signal produced by a single sensor.
KEYWORDS: Etching, Plasma, Silicon, Time division multiplexing, Signal processing, Semiconducting wafers, Plasma etching, Spectroscopy, Chemical analysis, Signal to noise ratio
During the fabrication of many MEMs devices it is required to etch a layer of material to completion stopping on the layer below (e.g. Silicon on Insulator (SOI) - clearing a Si layer stopping on an underlying silicon dioxide layer). Allowing the etch process to proceed beyond the time when the first layer has been removed can result in reduced thickness of the underlying stop layer, or feature profile degradation (known as "notching" for SOI applications). One method commonly used to detect plasma process termination times is optical emission spectrometry (OES). OES analyzes the light emitted from a plasma source to draw inferences about the chemical and physical state of the plasma process. In semiconductor processing this technique is commonly used to detect material interfaces during plasma etch processes. While this approach works well for single step processes or process with a limited number of discrete etch steps (such as an etch initiation followed by a main etch) it is difficult to apply OES techniques to plasma processes with rapid and periodic plasma perturbations such as time division multiplex (TDM) plasma etching processes for Si etching. At Unaxis USA, we have developed a proprietary optical emission end point algorithm in conjunction with OES to detect material transitions in TDM processes. This technique requires no synchronization of the algorithm to the TDM process and has been applied to silicon on insulator (SOI) structures. The mechanism and performance of the algorithm will be discussed. The sensitivity of the technique has been evaluated over a range of silicon etch loads. Signal to Noise (SNR) ratios of greater than 15:1 have been achieved for samples with less than 10% exposed silicon.
The quartz dry etch is a critical step in the manufacture of Alternating Aperture Phase Shift masks (alt-APSM). In order to maintain uniform phase shift across the mask, the etch depth uniformity has to be strictly controlled. Both the radial and linear components of non-uniformity have to be minimized. The Mask Etcher IV developed at Unaxis USA reduces both the components of non-uniformity using unique hardware adjustments. Using a fluorocarbon based chemistry, etch depth variations between different feature sizes is also minimized. With good etch depth linearity, phase shift does not vary with feature size. To achieve this, etched quartz structures need to have good selectivity to resist / chrome and vertical sidewalls. Etch depth uniformity was measured using an n&k1700 RT and etch depth linearity was measured using an AFM. Etched quartz structure morphologies are observed using a SEM. After preliminary screening experiments, an optimized hardware suite and process conditions that produce good etch depth uniformity, linearity and quartz profiles with vertical sidewalls and minimum microtrenching is determined.
Time division multiplexed (TDM) plasma etch processes have found widespread applications in Micro-Electro-Mechanical Systems (MEMS) device manufacturing. Very often, silicon-on-insulator (SOI) structures are used in MEMS applications with oxide layers used as etch stop/sacrificial layers as well as device function layers. Apart from the conventional requirements for deep silicon etch including high rate, selectivity and sidewall smoothness. SOI structures require finished etches to be free of undercut, commonly referred to as notching, at the silicon/oxide interface. Notching is aggravated due to the aspect ratio dependence (ARDE) effects. The ARDE effects cause structures with different aspect ratio to be etched at different etch rates, and result in the buried oxide layer in bigger features to be exposed while smaller features are still being etched.
At Unaxis USA, we have developed a proprietary technique to eliminate the notch formation while maintaining high etch rate. This technique is integrated into time division multiplexed (TDM) Si etch processes, and is implemented in a single etch process. The conventional "bulk" etch to "finish" etch transition is thus made unnecessary, with the benefit of no end point detection and smooth and uniform etch profile. Etch processes are characterized and notch performance is measured as a function over etch percentage and feature aspect ratio. Using the new SOI etching technique, notching is completely eliminated in aspect ratios up to 9:1 and reduced to well below 100 nm for aspect ratios up to 18:1. Moreover, this new technique has been demonstrated to limit the effect of extensive overetch in increasing notch size.
Alternating Aperture Phase Shift masks (alt-APSM) are being increasingly used to meet present day lithography requirements by providing increased resolution. The quartz dry etch is a critical step in the manufacture of these photomasks. Etch depth linearity, phase uniformity and minimum etched surface roughness are critical factors. To achieve this, etched quartz structures need to have good selectivity to resist / chrome, vertical sidewalls and good etch depth uniformity over the mask area. Using the Mask Etcher IV at Unaxis USA, a series of experiments were performed to study and identify the trends in quartz etching for photomasks. Etch depth uniformity was measured using an n&k1700RT and etch depth linearity from feature sizes ~0.4 micron to ~1.4 micron was measured using an AFM. Cross sections of the ~0.6 micron structure were obtained using a SEM to check for profile and any evidence of micro trenching. After several set-up experiments, an optimized process to minimize etch depth linearity and improve etch depth uniformity was obtained and is presented here.
Time division multiplexed (TDM) plasma etch processes have been widely applied to MEMS device manufacturing due to the capability of defining high aspect ratio features at high etch rates and mask selectivity. To etch anisotropic features using F-based chemistry, a TDM process cyclically alternates between etch and passivation steps, which are normally carried out with different gases introduced into a reaction chamber at different flow rates, and during which chamber pressures are maintained at different levels. Conventional process control methods often result in chamber pressure overshoot and/or undershoot, slow pressure response times, and long-term pressure drifts. These are undesirable effects in manufacturing MEMS devices due to the requirements on process stability, reliability and
repeatability.
At Unaxis USA Inc., a proprietary control technique has been developed for the TDM etch processes to better control chamber pressures and improve process stability. Controls over the movement of a throttle valve are realized through a combination of pre-positioning the valve and regulating it with the proportional, integral and derivative (PID) function mechanisms. Using this technique, we have demonstrated in fast TDM processes that pressure overshoot and undershoot are significantly suppressed, pressure response times are improved, and long-term pressure drifts are
eliminated. To this end, this new control technique has been successfully tested in processes where the etch/passivation process steps are alternating at frequencies up to 1 Hz. Applications of this advanced technique in deep silicon etching have demonstrated improved etch performance. As a result, this advanced pressure control
technique enables the TDM dry etching technologies for MEMS devices manufacturing to become markedly more reliable and stable.
KEYWORDS: Etching, Silicon, Switching, Time division multiplexing, Microelectromechanical systems, Plasma, Microsoft Foundation Class Library, Manufacturing, Plasma etching, Polymers
Sidewall smoothness is often a critical requirement for many MEMS devices, such as microfludic devices, chemical, biological and optical transducers, while fast silicon etch rate is another. For such applications, the time division multiplex (TDM) etch processes, so-called "Bosch" processes are widely employed. However, in the conventional TDM processes, rough sidewalls result due to scallop formation. To date, the amplitude of the scalloping has been directly linked to the silicon etch rate.
At Unaxis USA Inc., we have developed a proprietary fast gas switching technique that is effective for scalloping minimization in deep silicon etching processes. In this technique, process cycle times can be reduced from several seconds to as little as a fraction of second. Scallop amplitudes can be reduced with shorter process cycles. More importantly, as the scallop amplitude is progressively reduced, the silicon etch rate can be maintained relatively constant at high values. An optimized experiment has shown that at etch rate in excess of 7 μm/min, scallops with length of 116 nm and depth of 35 nm were obtained. The fast gas switching approach offers an ideal manufacturing solution for MEMS applications where extremely smooth sidewall and fast etch rate are crucial.
As critical dimensions and exposure wavelengths approach the physical limitations of optical lithography, the use of newer techniques such as Phase Shift Photomask Technologies become necessary to extend the viability of DUV lithography tools. Alternating Phase Shift Mask technologies are challenging the capabilities of current quartz dry etch processes; as this phase shift technique is achieved by the precise removal of quartz, the need for ever improving phase shift uniformity across the photomask surface requires extremely uniform quartz etch depth. To this end, a Next Generation ICP (Inductively Coupled Plasma) hardware configuration has been adopted. In this article, the quartz etch parameter space of this new ICP source is explored. Finally, process results including, quartz roughness, sidewall profile, and most importantly quartz etch rate uniformity will be presented.
The use of Plasma Etch for the fabrication of Binary Cr Photomasks has become a mainstream staple for advanced Reticle fabrication. These Binary Cr Reticles are suitable for the 0.18 micron technology Nodes and beyond and have forced an appreciation of the varying exposed Cr loads of different Mask layers.
As on-glass line widths shrink and exposure wavelengths approach the physical limitations of optical lithographic printing, the adoption of newer technology such as Off-Axis Illumination and Phase Shift Photomask technologies will substantially expand the operating life of DUV lithographic tools. In this article, the dry etch processes and Inductively Coupled Plasma (ICP) hardware iterations associated with the etch optimization of Levenson-style hard shifters are explored. These Alternating Aperture Hard Shifters currently adopt a single material form, with Levenson-style photomasks making use of a precise removal of quartz material between the Cr lines of a standard Photomask, improving the resolution of the exposed features. This precise quartz removal is performed utilizing dry etch technologies, with the use of high density, de-coupled plasmas such as ICP preferred. We explore Inductively Coupled Plasma shaping techniques along with newer etch processes for these materials, offering a Next Generation ICP Source design. Process conditions are verified and on-mask results are reported.
The use of Plasma Etch in patterning Binary Cr layers for modern reduction reticles has seen dramatic increase in the past two years. The drive towards the 0.25 micrometer and 0.18 micrometer technology has rendered wet etch of Binary Cr inadequate for the demanding gate level designs of most advanced devices. The use of dry etch for these patterns is studied closely through the pattern loading within a mask (Exposed Cr Load). It has been seen that Cr Load strongly affects several plasma etch responses, e.g.: resist selectivity, Cr etch rate, overall CD Uniformity and within- Mask CD Uniformity pattern.
There has been a great demand for improved end point detection techniques for advanced etching of III-V ternary multi stack layers. Current etch rate and end point monitoring techniques are based on three methods. The first is to use timed or a blind etch as it is known, this offers no monitoring of the etch process. The second is to use optical emission spectroscopy (OES) which is a secondary measurement of the process and requires a large open area, fast etch rate, and a detectable emission line from the etch products. The third is laser interferometry, a primary measurement, based on light interference of reflected beams from several layers in the stack. Up to now the use of commercially available interferometric techniques has not permitted the measurement of etch rates and end point the etch processes due to the absorption of the wavelengths of light available in current process control systems. A new in-situ end point system utilizing a 905 nm laser interferometer will be described that allows the ability to follow dry etching of III-V ternary multi stack layers. End point detection techniques on various AlxGa1-xAs layers on GaAs with varying compositions (i.e. X equals 0.3 - 0.92) and different types (n- or p- AlGaAs) are examined.
The plasma etching of Binary Cr films has become a true rate- limiting step in the recent production of high quality, 0.18 mm design rule Masks. The use of wet etch technology for Gate- level Poly definition Reticles is exceedingly difficult for 0.18 mm technologies and beyond; especially if the use of Optical Proximity Corrections (OPC's) becomes mainstream. The use of Plasma etch will significantly improve the Isolated/Dense Linearity as well as overall CD Uniformity. However, a recent issue is that the Cr dry etch parameters are sensitive to the overall Cr loading for the Mask pattern. It is well known that low Cr masks (e.g., Contact layer patterns) will require a different set of process conditions then more highly loaded parts (e.g., SRAM patterns). This study focuses on the resultant uniformity of Cr etch, both for the blanket etch of Cr as well as the etch of high and low load parts for CD Evaluation.
The continuing requirements for high resolution, critical dimension control and linearity on photomasks necessitates highly anisotropic and uniform etching of the absorber material. Plasma etching has seen strong increases in popularity to improve the above mentioned requirements. Also recently popular is the inclusion of Embedded Phase Shift materials such as Molybdenum Silicide (MoSi); these materials allow for an engineered 180 degree shift in the phase of the exposure light at the wafer pane, affording enhanced contrast at the edges of a line or feature. This article studies the effect of ICP-based plasma conditions on the CD Uniformity, MoSi etch rate and post-etch Quartz roughness of 6 X 6 DUV MoSi Embedded Phase Shift mask structures through use of carefully Designed Experiments. This Design of Experiment (DOE) makes it possible to screen plasma chemistry, optimize resultant plasma parameters and present an overlayed Simultaneous Solution which is used as a centerpoint for Device Plate etch tuning. The high plasma density, independent ion energy control and low pressure operation of Inductively Coupled Plasmas make this technology well suited to minimizing undercut of the MoSi and affords a vehicle for the realization of a zero-basis etch process.
As device design rules continue to shrink, on-mask Cr structures must experience a corresponding reduction in size. Although 0.25 micrometer design rules require only 1 micrometer Cr features, the use of OPC structures, which may be needed to minimize line foreshortening and corner rounding, necessitate features to be etched into the Cr which are significantly smaller than this. This need, coupled with the demand for reduced CD bias and improved CD uniformities, requires the use of an alternate chrome etch technology. Plasma etching of Cr can be highly anisotropic, greatly reducing the etch under cut which is responsible for the CD bias typically associated with wet etching. Reactive ion etching (RIE) can provide significant enhancements in the capability of replicating micron and sub-micron features, but the Cr etch rate non-uniformity which is typical of this technique can translate into a CD nonuniformity. This is due in part to the relatively high pressure of operation (50 - 100 mTorr which is necessary to reduce the self generated dc voltage And which minimizes the photo resist etch rate. Recently, high density plasma sources, such as inductively coupled plasma (ICP), have become available which have the ability to operate both at low pressures and high plasma density while maintaining a low and controllable dc voltage. The low pressure operation significantly improves the etch rate uniformity and consequently the CD uniformity. In this study a design of experiment (DOE) is used to investigate the parameter space associated with the dry etching of Cr using an ICP source. The responses of Cr etch rate, selectivity to photo resist, CD uniformity and mean CD to target are studied, and from this an optimized parameter space is defined. Within this space the effect of overetch, dc voltage and pattern loading on the CD uniformity are also investigated. The role played by the photo resist profile in determining the Cr etch profile is also studied and preliminary measurements are made to understand the effect of the above parameters on the mask CD bias.
As device design rules continue to shrink, on-mask Cr structures must experience a corresponding reduction in size. Although 0.25 micrometer design rules require only 1 micrometer Cr features, the use of OPC structures, which may be needed to minimize line foreshortening and corner rounding, necessitate features to be etched into the Cr which are significantly smaller than this. This need, coupled with the demand for reduced CD bias and improved CD uniformities, requires the use of an alternate chrome etch technology. Plasma etching of Cr can be highly anisotropic, greatly reducing the etch undercut which is responsible for the CD bias typically associated with wet etching. Reactive ion etching (RIE) can provide significant enhancements in the capability of replicating micron and sub-micron features, but the Cr etch rate non-uniformity which is typical of this technique can translate into a CD non-uniformity. This is due in part to the relatively high pressure of operation (50 - 100 mTorr) which is necessary to reduce the self generated dc voltage and which, in turn, minimizes the photo resist etch rate. Recently, high density plasma sources, such as inductively coupled plasma (ICP), have become available which have the ability to operate both at low pressures and high plasma density while maintaining a low and controllable dc voltage. The low pressure operation significantly improves the etch rate uniformity and consequently the CD uniformity. By coupling this ICP plasma source with a non-contact backside photomask handling system and a true multi-station 'cluster tool.' In this study a design of experiment (DOE) is used to investigate the parameter space associated with the dry etching of Cr using an ICP source. The responses of Cr etch rate, selectivity to photo resist, CD uniformity and mean CD to target are studied, and from this an optimized parameter space is defined. Within this space the effect of overetch, dc voltage and pattern loading on the CD uniformity are also investigated. The role played by the photo resist profile in determining the Cr etch profile is also studied, and preliminary measurements are made to understand the effect of the above parameters on the mask CD bias.
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