In the exponential drive to go to the smaller feature size, the control of the line width variation becomes more important than ever before. Hybrid PPC (Process Proximity Correction) has been one of the indispensable methods to satisfy the requirements of CD control and yield improvement. In this paper, an effective methodology for hybrid PPC is presented to reduce the data volume and the complexity of patterns and to enhance the accuracy of correction. The selective engine in the hybrid PPC flow classifies the gate patterns into the areas of model-based and rule-based PPC considering a device performance, a modeling accuracy, and the extension of the contact overlap margin. The effective method of edge pattern modeling is exploited to compensate the nonlinear etch proximity effect in the asymmetrical pattern configuration. Using the hybrid PPC method with the 1 nm correction grid, 22% of the additional reduction in the intra-die CD variation compared to the rule-based PPC with 5 nm correction grid has been achieved.
In this paper, we report highly effective Optical Proximity Correction (OPC) techniques to improve the process margin in the photo lithography process of metal layer, which can be applied to 0.14 micrometer DRAM technology node and beyond. The proposed test pattern reflects the optical limitation of each situation, the rules can be established by simply investigating the test patterns which solves the problems such as lack of contact overlap margin, line-end shortening, and size reduction in isolated and island patterns. This sophisticated rule is considering the vertical environment as well. Thanks to systematic sequence for rule extraction, we could minimize additional burdens such as error occurrence, rule set-up time, data volume, manufacturing time of mask. By applying this method, DOF margin of metal layer could be improved from 0.4 micrometer to beyond 0.6 micrometer, which provides sufficient process window for mass production of 0.14 micrometer DRAM technology. In addition, we also confirmed that the new OPC technology could be extended to the metal layer of 0.11 micrometer DRAM.
A practical optical proximity correction (OPC) method is introduced and applied to 0.25 micrometers DRAM process in order to reduce the gate critical dimension (CD) variations across the exposure field. A variable threshold model is made and evaluated to enhance the model accuracy. This model takes maximum 2X computation time compared with the constant threshold model. The proposed OPC methodology considering both process effects and mask manufacturability simultaneously is discussed in view of the gate line CD variation. The correction segments of a pattern are optimized considering mask manufacturability. Patterns with jog sizes larger than 0.4 micrometers are inspect able with KLA35UV. The OPC results exhibited 60 percent reduction of gate CD variation, 90 percent matching of mean-to-target CD, and 15 percent improvement of circuit performance.
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