Mr. Trong Huynh-Bao Profile

Trong Huynh-Bao

at imec

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Publications (1)

Proceedings Article | 16 March 2016 Paper

Toward the 5nm technology: layout optimization and performance benchmark for logic/SRAMs using lateral and vertical GAA FETs

Trong Huynh-Bao, Julien Ryckaert, Sushil Sakhare, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Piet Wambacq

Proceedings Volume 9781, 978102 (2016) https://doi.org/10.1117/12.2218361

KEYWORDS: Nanowires, Field effect transistors, Extreme ultraviolet lithography, Design for manufacturability, Manufacturing, Transistors, Metals, Lithography, Logic, Optical lithography, Photovoltaics, Gallium arsenide, CMOS technology, Diffusion, Electrodes

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