Integrated electro-optic modulators offer huge potential to meet communications and computations' rapidly growing bandwidth requirements. Devices based on silicon allow high-volume, low-cost CMOS fabrication, and co-integration with the CMOS circuits. They are promising candidates for mass-producible Tb/s-scale inter-rack and intra-rack interconnects. This talk will focus on our advancement of silicon-based optical modulators: (1) miniaturized all silicon MOSCAP modulators for co-packaged optics and its integration with low voltage drivers, allowing low optical power consumption of 2 pJ/bit. (2) Novel carrier absorption enhanced electro-optical modulation in MOSCAP ring resonators towards integration with ultra-low voltage (<1V) CMOS drivers; (3) Carrier depletion ring unity device for large scale and high bandwidth density error-free links; (4) Linear DC-Kerr effect dominated silicon modulators towards lidar and quantum applications.
We present the development of Ge-on-Si waveguide-based devices for low-noise mid-infrared absorption spectroscopy of aqueous solutions, targeting wavelengths between 6 and 10 μm, that are able to reduce the relative intensity noise which is a key roadblock when measuring tiny analyte absorptions masked by a large background matrix absorption. The sensor uses a pair of integrated thermo-optic switches to continuously switch light between a reference waveguide and a sensor waveguide, so that common noise components can be cancelled out, even when the light source and photodetector are not integrated on the same chip.
The mid-infrared (mid-IR) is an important wavelength range for vibrational absorption spectroscopy (e.g. for gas sensing, medical diagnostics, environmental monitoring), and thus there is a strong need for small and stable on-chip spectrometers. It is also desirable for it to be inexpensive to fabricate and for it to be able to perform high-resolution measurements over a wide bandwidth. To this end, we demonstrate two kinds of mid-IR thermo-optic type Fourier Transform spectrometers (FTS). Both variations of the device are designed to target a central wavelength of 3.8 μm and are based on the silicon-on-insulator platform. These two devices are verified by using them to retrieve the spectrum of a quantum cascade laser when it is tuned to different wavelengths. They have the potential to achieve higher resolution and bandwidth through subsequent design optimization, and could in future be integrated with mid-infrared photodetectors.
High-speed (upwards of 105 coordinates s-1) and long-range (~10 m) absolute distance measurement applications based on frequency scanning interferometry (FSI) generate very high modulation frequencies (typically >100 GHz) due to the laser frequency sweep rate and the large imbalance between the reference and object arms. Such systems are currently impractical due to the extremely high cost associated with sampling at these signal frequencies. Adaptive delay lines (ADLs) were recently proposed as a solution to balance the interferometer and therefore reduce sampling rate requirements by a factor of 2N, where N is the number of switches in the ADL [1, 2]. The technique has been successfully demonstrated in the lab using bulk optics and optical fiber configurations, and further reduction in size and cost will increase the breadth of metrology applications that can be addressed. Silicon photonics constitute an effective platform to miniaturize ADLs to chip-scale, simplifying instrument manufacture and providing a more robust configuration compared to bulk-optics and fiber-based solutions. We discuss the design and fabrication of chip-scale ADLs on a silicon on insulator (SOI) photonics platform, using optical switches based on heaters, multi-mode interferometer (MMI) couplers and Mach-Zehnder interferometers (MZI). We also establish the heater voltages of 4 switches in series, required to switch the optical path in the reference arm, a necessary step to use the device for FSI range measurements.
High speed optical modulators are important for a number of applications served by silicon photonics. Here we present our recent work towards high speed free carrier accumulation based optical modulators where a high speed and efficient operation is achieved. Such silicon optical modulators typically need to be built in sub-micrometre sized waveguides which are challenging to couple light to and from. Also presented are experimental results from a buried 3D-taper that is able to couple efficiently between a waveguide of height ~1.5um and a 220nm high waveguide. Losses below 0.6dB are achieved limited by the loss of the material used.
The silicon optical modulator is a key component in a high speed optical data link. To advance the modulator performance beyond the popular carrier depletion based devices, we have produced a capacitive device which is instead based upon the accumulation of free carriers either side of a thin insulating layer positioned in the middle of the waveguide. Such a device has a superior efficiency compared with the carrier depletion approach allowing compactness and improved power consumption whilst retaining high speed operation and CMOS compatibility.
The interest in developing high-performance optical modulator to meet the growing demands of data processing speed has increased over the last decade. While there have been significant research efforts in developing standalone silicon modulators, works on integrating those with electronics is limited, which is necessary for the practical implementation of short-reach optical interconnects.
In contrast to previous work in the field where electronic–photonic integration was mostly limited to the physical coupling approach, we have introduced a new design philosophy, where photonics and electronics must be considered as a single integrated system in order to tackle the demanding technical challenges of this field.
In this work, I shall present our recent 100Gb/s silicon photonics transmitter, where photonic and electronic devices are co-designed synergistically in terms of device packaging, power efficiency, operation speed, footprint and modulation format.
As the market adoption of silicon photonics technologies continues to rise, and ever more fabless companies enter the market, there is a clear need for a flexible device prototyping foundry service that retains the ability for device level innovation, whilst also offering a clear route to market. The CORNERSTONE platform offers an affordable multi-project-wafer (MPW) service that allows a degree of customisation, which may not be accessible at other foundries. Through the use of DUV projection lithography, fabrication processes can be easily transferred to other foundries for mass production. Additionally, the ability to exploit high resolution e-beam lithography for certain layers mimics more advanced technology nodes, should this be deemed necessary. Several silicon-on-insulator platforms enable a plethora of applications including datacoms, LIDAR and mid-IR sensing.
This talk gives an overview of the present status of the CORNERSTONE platforms, and an outlook for the future.
Electrical annealing of erasable directional couplers (DCs) was realized. Titanium nitride (TiN) micro-heaters were used to electrically heat up and anneal the Ge-ion implanted regions in silicon, which are used as the coupling waveguides in the erasable DCs. The refractive index of implanted silicon was reduced rapidly by electrical annealing, so that the DCs were effectively erased. The whole annealing process can be accomplished in about 2 seconds. Based on the simulation results, the implanted region can be heated up to about 700 °C.
The field of silicon photonics has expanded rapidly over the past several decades. This has led to a degree of standardisation in the commercial device fabrication foundries that are available for universities and fabless companies alike. Whilst this is advantageous in terms of yield, repeatability etc., it is not conducive for researchers to develop new and novel devices for future systems. CORNERSTONE offers researchers a flexible device prototyping capability that can support photonics research around the world.
The CORNERSTONE project (Capability for OptoelectRoNics, mEtamateRialS, nanoTechnOlogy, aNd sEnsing) is a UK Engineering and Physical Sciences Research Council (EPSRC) funded project between 3 UK universities: University of Southampton, University of Glasgow and University of Surrey. The project is based on deep-ultraviolet (DUV) photolithography equipment, installed at the University of Southampton, centred around a 248 nm Scanner, the first of its kind in a UK university. Utilising these facilities, CORNERSTONE will offer a multi-project wafer (MPW) service on several silicon-on-insulator (SOI) platforms (220 nm, 340 nm & 500 nm) for both passive and active silicon photonic devices.
This talk will give an overview of the CORNERSTONE project, present some of its early data, and summarise future MPW offerings.
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