Dr. Youping Zhang Profile

Dr. Youping Zhang

Director/Product Marketing at ASML

SPIE Involvement:

Author

Publications (20)

Proceedings Article | 10 April 2024 Presentation + Paper

Improving EUV sub-40nm via single patterning using wavefront and pupil co-optimization

Soojung Kim, No Young Chung, Kwangseok Maeng, Hyunjae Cho, Jerry Lim, Hyungrok Jang, Jae Hyoung Kim, Insung Kim, Eelco van Setten, Hidde Keizers, Ajinkya Patil, Steven Beekmans, Jungtae Lee, Ki-Seok Kim, James Lee, Sung-Woon Park, Jialei Tang, Stephen Hsu, Youping Zhang, Paul Derks

Proceedings Volume 12953, 1295306 (2024) https://doi.org/10.1117/12.3009878

KEYWORDS: Wavefronts, Extreme ultraviolet, Extreme ultraviolet lithography, Light sources and illumination, Stochastic processes, Diffraction, Optical lithography, Source mask optimization, Projection systems

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SPIE Journal Paper | 30 January 2024

Curvilinear data representation and its impact on file size and lithographic performance

Jiuning Hu, Adam Lyons, Chris Spence, Kurt Wampler, Mahmoud Mohsen, Yen-Wen Lu, Rachit Gupta, Youping Zhang, Rafael Howell, Jiyoon Chang, James Moon, Jun Ye

JM3, Vol. 23, Issue 01, 011204, (January 2024) https://doi.org/10.1117/12.10.1117/1.JMM.23.1.011204

KEYWORDS: Microchannel plates, Optical proximity correction, Lithography, Extreme ultraviolet, Deep ultraviolet, Solids, SRAF, Metals, Photovoltaics, Data storage

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Proceedings Article | 28 April 2023 Paper

Computational lithography solutions to support EUV high-NA patterning

Rongkuo Zhao, Fan Zhou, Jialei Tang, Jeff Lu, Yunbo Liu, Dezheng Sun, Ming-Chun Tien, Stephen Hsu, Rachit Gupta, Youping Zhang, Joerg Zimmermann

Proceedings Volume 12495, 124950R (2023) https://doi.org/10.1117/12.2660858

KEYWORDS: Source mask optimization, SRAF, Light sources and illumination, Extreme ultraviolet, 3D mask effects, Image quality, Computational lithography

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Proceedings Article | 28 April 2023 Presentation + Paper

Curvilinear data representation and its impact on file size and lithographic performance

Jiuning Hu, Adam Lyons, Chris Spence, Kurt Wampler, Mahmoud Mohsen, Yen-Wen Lu, Rachit Gupta, Youping Zhang, Rafael Howell, Jun Ye

Proceedings Volume 12495, 1249506 (2023) https://doi.org/10.1117/12.2658649

KEYWORDS: Optical proximity correction, Lithography, Extreme ultraviolet, Deep ultraviolet, Data storage

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Proceedings Article | 28 April 2023 Presentation + Paper

A holistic approach to model-based stochastic-aware computational lithography

ChangAn Wang, Yongfa Fan, Mu Feng, Qian Xie, Jazer Wang, Chris Kaplan, Michael Crouse, Xiaoyang Li, Stephen Hsu, Peigen Cao, Yi-Hsing Peng, Stephen Chang, Jun Ye, Youping Zhang, Bin Cheng, Ken Yang, Leiwu Zheng, Jen-Shiang Wang, Austin Peng, Li-Hao Yeh, Cuiping Zhang, Rafael Howell, Alexander Tan, Yiqiong Zhao, Jun Lang, Xiaolong Zhang

Proceedings Volume 12494, 124940B (2023) https://doi.org/10.1117/12.2658508

KEYWORDS: Stochastic processes, Data modeling, Optical proximity correction, Line width roughness, Source mask optimization, Computational lithography, Semiconducting wafers, Modeling, Performance modeling, Photons

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Proceedings Article | 20 March 2019 Paper

Robust alignment mark design for DRAM using a holistic computational approach

Danying Li, Stella Zhang, Chia-Huang Chen, Youping Zhang, Alex Huang, David Xu, Yufeng Wang, Zhen Shi, Shi-lu Wang, Sheng-Tsung Tsao, Angmar Li, Andy Yang, Junwei Lu

Proceedings Volume 10961, 109610Z (2019) https://doi.org/10.1117/12.2532841

KEYWORDS: Optical proximity correction, Optical alignment, Semiconducting wafers, Optical lithography, Signal processing, Printing, Metrology, Overlay metrology

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Proceedings Article | 28 March 2017 Paper

Efficient hybrid metrology for focus, CD, and overlay

W. T. Tel, B. Segers, R. Anunciado, Y. Zhang, P. Wong, T. Hasan, C. Prentice

Proceedings Volume 10145, 101452E (2017) https://doi.org/10.1117/12.2257965

KEYWORDS: Metrology, Overlay metrology, Critical dimension metrology, Optical lithography, Scanners, Semiconductors, Semiconducting wafers, Etching, Sensors, Reticles

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Proceedings Article | 20 October 2016 Paper

Eliminating the offset between overlay metrology and device patterns using computational metrology target design

Jianming Zhou, Sarah Wu, Craig Hickman, Ewoud van West, Maurits van der Schaar, Wangshi Zhou, Youping Zhang, Sean Park, Paul Tuffy, Dan Ulmer, Cedric Affentauschegg, Henk Niesing

Proceedings Volume 9778, 97781G (2016) https://doi.org/10.1117/12.2219439

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Proceedings Article | 24 March 2016 Paper

OPC optimization techniques for enabling the reduction of mismatch between overlay metrology and the device pattern cell

Shinyoung Kim, Chanha Park, Jinhyuck Jun, Jaehee Hwang, Hyunjo Yang, Nang-Lyeom Oh, Sean Park, Chris Park, Kyu-Tae Sun, Youping Zhang, Paul Tuffy

Proceedings Volume 9778, 97781S (2016) https://doi.org/10.1117/12.2219467

KEYWORDS: Overlay metrology, Optical proximity correction, Diffraction, Critical dimension metrology, Metrology, Scanning electron microscopy, Electron microscopes, Optical lithography, Error analysis, Target detection

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Proceedings Article | 19 March 2015 Paper

Holistic approach using accuracy of diffraction-based integrated metrology to improve on-product performance, reduce cycle time, and cost at litho

Kaustuve Bhattacharyya, Arie den Boef, Martin Jak, Gary Zhang, Martijn Maassen, Robin Tijssen, Omer Adam, Andreas Fuchs, Youping Zhang, Jacky Huang, Vincent Couraudon, Wilson Tzeng, Eason Su, Cathy Wang, Jim Kavanagh, Christophe Fouquet

Proceedings Volume 9424, 94241E (2015) https://doi.org/10.1117/12.2085678

KEYWORDS: Overlay metrology, Metrology, Time metrology, Target acquisition, Semiconducting wafers, Target detection, Etching, Back end of line, Scanners, Process control

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Proceedings Article | 19 March 2015 Paper

Improving full-wafer on-product overlay using computationally designed process-robust and device-like metrology targets

Young-Sik Kim, Young-Sun Hwang, Mi-Rim Jung, Ji-Hwan Yoo, Won-Taik Kwon, Kevin Ryan, Paul Tuffy, Youping Zhang, Sean Park, Nang-Lyeom Oh, Chris Park, Mir Shahrjerdy, Roy Werkman, Kyu-Tae Sun, Jin-Moo Byun

Proceedings Volume 9424, 942414 (2015) https://doi.org/10.1117/12.2085645

KEYWORDS: Overlay metrology, Metrology, Target detection, Semiconducting wafers, Optical proximity correction, Resolution enhancement technologies, Reticles, Lithography, Optical lithography, Etching

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Proceedings Article | 2 April 2014 Paper

Improving on-product performance at litho using integrated diffraction-based metrology and computationally designed device-like targets fit for advanced technologies (incl. FinFET)

Kai-Hsiung Chen, GT Huang, KS Chen, C. Hsieh, YC Chen, CM Ke, TS Gau, YC Ku, Kaustuve Bhattacharyya, Jacky Huang, Arie den Boef, Maurits v. d. Schaar, Martijn Maassen, Reinder Plug, Youping Zhang, Steffen Meyer, Martijn van Veen, Chris de Ruiter, Jon Wu, Hua Xu, Tatung Chow, Charlie Chen, Eric Verhoeven, Pu Li, Paul Hinnen, Greet Storms, Kelvin Pao, Gary Zhang, Christophe Fouquet, Takuya Mori

Proceedings Volume 9050, 90500S (2014) https://doi.org/10.1117/12.2047098

KEYWORDS: Overlay metrology, Metrology, Semiconducting wafers, Back end of line, Scanners, Diffraction, Front end of line, Process control, Etching

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Proceedings Article | 22 February 2012 Paper

Lens heating challenges for negative tone develop layers with freeform illumination: a comparative study of experimental vs. simulated results

Scott Halle, Michael Crouse, Aiqin Jiang, Youri van Dommelen, Tim Brunner, Blandine Minghetti, Matt Colburn, Youping Zhang

Proceedings Volume 8326, 832607 (2012) https://doi.org/10.1117/12.916312

KEYWORDS: Reticles, Semiconducting wafers, Source mask optimization, Monochromatic aberrations, Lithography, Calibration, Photomasks, Critical dimension metrology, Device simulation, Overlay metrology

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Proceedings Article | 23 March 2011 Paper

Advanced wavefront engineering for improved imaging and overlay applications on a 1.35 NA immersion scanner

Frank Staals, Alena Andryzhyieuskaya, Hans Bakker, Marcel Beems, Jo Finders, Thijs Hollink, Jan Mulkens, Angelique Nachtwein, Rob Willekers, Peter Engblom, Toralf Gruner, Youping Zhang

Proceedings Volume 7973, 79731G (2011) https://doi.org/10.1117/12.880759

KEYWORDS: Wavefronts, Photomasks, Scanners, Source mask optimization, Optimization (mathematics), Semiconducting wafers, 3D acquisition, Reticles, Computational lithography, 3D image processing

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Proceedings Article | 4 March 2010 Paper

Improving aberration control with application specific optimization using computational lithography

Jianming Zhou, Youping Zhang, Peter Engblom, Mike Hyatt, Eric Wu, Martin Snajdr, Anton deVilliers, Yuan He, Craig Hickman, Peng Liu, Dennis de Lang, Bernd Geh, Erik Byers, Scott Light

Proceedings Volume 7640, 76400K (2010) https://doi.org/10.1117/12.846697

KEYWORDS: Semiconducting wafers, Scanners, Computational lithography, Optimization (mathematics), Calibration, Finite element methods, Thermal modeling, Computer simulations, Data modeling, Critical dimension metrology

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Proceedings Article | 4 March 2010 Paper

A computational method for optimal application specific lens control in microlithography

Peng Liu, Martin Snajdr, Zhengfan Zhang, Yu Cao, Jun Ye, Youping Zhang

Proceedings Volume 7640, 76400M (2010) https://doi.org/10.1117/12.846836

KEYWORDS: Scanners, Optimization (mathematics), Critical dimension metrology, Lithography, Process control, Computer simulations, Optical lithography, Photomasks, Transform theory, Software development

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Proceedings Article | 30 October 2007 Paper

Production-worthy full chip image-based verification

Zongchang Yu, Youping Zhang, Yanjun Xiao, Wanyu Li

Proceedings Volume 6730, 67300T (2007) https://doi.org/10.1117/12.747022

KEYWORDS: Artificial intelligence, Inspection, Optical proximity correction, Evolutionary algorithms, Printing, Metals, Tolerancing, Feature extraction, Computer simulations, Sensors

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At 65nm technology node and below, with the ever-smaller process window, it is no longer sufficient to apply traditional model-based verification at only the nominal condition. Full-chip, full process-window verification has started to integrate into the OPC flow at the 65nm production as a way of preventing potentially weak post-OPC designs from reaching the mask making step. Through process-window analysis can be done by way of simulating wafer images at each of the corresponding focus and exposure dose conditions throughout the process window using an accurate and predictive FEM model. Alternatively, due to the strong correlation between the post-OPC design sensitivity to dose variation and aerial image (AI) quality, the study of through-dose behavior of the post-OPC design can also be carried out by carefully analyzing the AI. These types of analysis can be performed at multiple defocus conditions to assess the robustness of the post-OPC designs with respect to focus and dose variations. In this paper, we study the AI based approach for post-OPC verification in detail. For metal layer, the primary metrics for verification are bridging, necking, and via coverage. In this paper we are mainly interested in studying bridging and necking. The minimum AI value in the open space gives an indication of its susceptibility to bridging in an over-dosed situation. Lower minimum intensity indicates less risk of bridging. Conversely, the maximum AI between the metal lines provides indication of potential necking issues in an under-dosed situation. At times, however, in a complex 2D pattern area, the location as to where the AI reaches either maximum or minimum is not obvious. This requires a full-chip, dense image-based approach to fully explore the AI profile of the entire space of the design. We have developed such an algorithm to find the AI maximums and minimums that will bear true relevance to the bridging and necking analysis. In this paper, we apply the full-chip image-based analysis to 65nm metal layers. We demonstrate the capturing of potential bridging or necking issues as identified by the AI analysis. Finally, we show the performance of the full-chip image-based verification.

Proceedings Article | 20 May 2006 Paper

A focus exposure matrix model for full chip lithography manufacturability check and optical proximity correction

Youping Zhang, Mu Feng, Hua-yu Liu

Proceedings Volume 6283, 62830W (2006) https://doi.org/10.1117/12.681856

KEYWORDS: Finite element methods, Calibration, Optical proximity correction, Lithography, Process modeling, Data modeling, Semiconducting wafers, Model-based design, Statistical modeling, Computer simulations

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Due to the low k₁-factor which leads to reduced process latitude, it is becoming increasingly important that OPC and lithography verification take into account process variations. An essential element to the successful implementation of full-chip, process window aware RET/OPC design and verification is a lithography model that is able to accurately describe the lithography process across the entire focus-exposure window. Moreover, a straightforward calibration without requiring excessive amount of through process window measurements is also critical to ensure quick turnaround-time. In this paper, we introduce a new Focus Exposure Matrix (FEM) model based on Brion's Tachyon platform. The FEM model has two adjustable parameters: focus and exposure. By adjusting these parameters, new models at arbitrary process conditions within the process window can be quickly derived, with which large number of simulation results can be obtained at different exposure and focus for detailed process window analysis. The fitting of FEM model is through a single calibration process using wafer measurements at limited number of sampling locations within the process window. The resulting calibrated FEM model is shown to have superior fitting as well as prediction accuracy, without requiring massive additional focus-exposure measurements. Accurate FEM modeling enables two important applications in the deep sub-wavelength regime: lithography manufacturability check (LMC) and optical proximity correction (OPC). FEM-enabled LMC proves to be a substantial advance in model-based verification by providing through process window analysis capability. Furthermore, FEM models can be employed in OPC practically to prevent catastrophic failures due to process variation while still maintaining satisfactory OPC quality in terms of matching the modeled wafer image to design intent. In this paper, we use real data and simulation results to demonstrate the quality of the FEM-model and its effectiveness in the LMC and OPC applications.

Proceedings Article | 28 August 2003 Paper

Improve accuracy of empirical models with multiple models

Youping Zhang, Minghui Fan

Proceedings Volume 5130, (2003) https://doi.org/10.1117/12.504254

KEYWORDS: Data modeling, Binary data, Calibration, Process modeling, Phase shifts, Semiconducting wafers, Lithography, Optical proximity correction, Physics, Etching

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Proceedings Article | 10 July 2003 Paper

Simulation-based data processing using repeated pattern identification

Youping Zhang

Proceedings Volume 5042, (2003) https://doi.org/10.1117/12.485457

KEYWORDS: Optical proximity correction, Model-based design, Data modeling, Databases, Data processing, Phase shifts, Imaging systems, Computer simulations, Performance modeling, Resolution enhancement technologies

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In typical integrated circuits (IC) designs, the final layout generally contains a lot of repeated patterns. Many of these repetitions are captured by the layout hierarchy. That is, the layout contains many cells that are each repeatedly placed in many locations with different transformation. Effective use of such repetition information in the computation intensive operations such as model-based optical proximity correction (OPC), verification, or contour generation, can lead to significant performance improvement. However, in many other occasions, such repetition information is not directly available. For example, if the layout is flattened, then all the hierarchy that captures the repetition information is lost. Even in hierarchical layout, a cell can contain repeated geometries or patterns. In order for the application to take advantage of such property, a mechanism to efficiently capture such repetition information is necessary. In this paper, we consider the model-based applications that have a unique property, which allows us to find different geometrical patterns that are equivalent in principle for simulation purpose. We introduce a proximity-based pattern identification method which aims at recognizing the maximum amount of repetition in the layout. This method not only captures repeated or symmetric geometries that are present from either the flattening of the hierarchy or within a cell itself, but also finds symmetries within the geometries themselves. The method also finds partial repetitions of geometries that are not completely identical or symmetric. Ideally, these “equivalent” patterns will eventually carry the same processing results with miniscule variations small enough to be ignored for the application. For this reason, it is sufficient to run the computationally expensive model-based operations for one of the pattern and carry the result to the rest of the patterns of the same family. Doing so reduces the problem size as well as the amount of data that requires processing. The total processing time therefore can be dramatically reduced. We demonstrate the method by using OPC as a test example. We show the level of problem size reduction and job run time reduction due to the specific nature of different layouts.

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