Mitigating charge spill-back induced image lag with a multi-level transfer gate pulse in PPD image sensors

J. Ivory; K. D. Stefanov; A. D. Holland

doi:10.1117/12.2562529

13 December 2020 Mitigating charge spill-back induced image lag with a multi-level transfer gate pulse in PPD image sensors

J. Ivory, K. D. Stefanov, A. D. Holland

Author Affiliations +

Proceedings Volume 11454, X-Ray, Optical, and Infrared Detectors for Astronomy IX; 114540F (2020) https://doi.org/10.1117/12.2562529
Event: SPIE Astronomical Telescopes + Instrumentation, 2020, Online Only

Abstract

A new method for minimizing image lag due to charge spill-back has been developed for pinned photodiode CMOS image sensors. The proposed method involves the use of multi-level transfer gate voltage during a single charge transfer period. Measurement results show that the new transfer process maintains the lower values for image lag at low signal levels that a high transfer gate voltage grants, whilst simultaneously preserving the later onset of spill-back dominated lag that a lower transfer gate voltage allows.

Conference Presentation

Citation Download Citation

J. Ivory, K. D. Stefanov, and A. D. Holland "Mitigating charge spill-back induced image lag with a multi-level transfer gate pulse in PPD image sensors", Proc. SPIE 11454, X-Ray, Optical, and Infrared Detectors for Astronomy IX, 114540F (13 December 2020); https://doi.org/10.1117/12.2562529

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