A two-step adc architecture for high dynamic range and high sensitivity image sensor

Shengyou Zhong; Wenbiao Mao; Mei Zou; Jiqing Zhang; Nan Chen; Libin Yao

doi:10.1117/12.2564708

17 April 2020 A two-step adc architecture for high dynamic range and high sensitivity image sensor

Shengyou Zhong, Wenbiao Mao, Mei Zou, Jiqing Zhang, Nan Chen, Libin Yao

Proceedings Volume 11455, Sixth Symposium on Novel Optoelectronic Detection Technology and Applications; 114553R (2020) https://doi.org/10.1117/12.2564708
Event: Sixth Symposium on Novel Photoelectronic Detection Technology and Application, 2019, Beijing, China

Abstract

This paper presents a two-step ADC architecture for high dynamic range, high sensitivity image sensor. The proposed two-step ADC architecture works in two phases: the coarse quantization phase in each pixel, digital integration technique is applied to increase the well capacity as well as system’s dynamic range, and a capacitive transimpedence amplifier (CTIA) scheme is employed to achieve high sensitivity; The fine quantization phase in the column which reduces the bit width of the pixel-level ADC, pixel-level ADC’s noise and layout area are reduced consequently. The proposed two-step ADC with 18 bits is designed in 0.18 μm standard CMOS process. The optimized assignment for the bit width of pixel-level ADC and column paralleled ADC is applied. The simulation shows the signal to noise ratio (SNR) is 93.5 dB. The dynamic range is 108 dB. The least sensible electrons are 781 e-. The simulation results indicate the proposed twostep ADC is suitable for high dynamic range, high sensitivity image sensor.

Citation Download Citation

Shengyou Zhong, Wenbiao Mao, Mei Zou, Jiqing Zhang, Nan Chen, and Libin Yao "A two-step adc architecture for high dynamic range and high sensitivity image sensor", Proc. SPIE 11455, Sixth Symposium on Novel Optoelectronic Detection Technology and Applications, 114553R (17 April 2020); https://doi.org/10.1117/12.2564708

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