Silicon photonics is becoming a significant platform in high-bandwidth, low power device applications for HPC and cloud computing infrastructure. Its continuing push to displace incumbent copper and VCSEL technologies depends on the scaling potential of existing CMOS manufacturing processes. Central to this process is still the photomask, and its’ ability to accurately render design intent. However, processes and quality metrics that have been developed for electronics-centric photomasks do not translate directly to the needs of photonics-centric photomasks. This may lead to unconventional or non-intuitive choices for data rendering (fracture), mask pattern tooling (laser vs e-beam). Standard metrology (CD Uniformity, Localized LER) may not capture the essential elements that correlate mask pattern fidelity with waveguide signal loss. There are likely limits to a “blind translation” of IC-centric metrics to photonics-centric metrics. This paper will report on a collaborative effort to compare several photomask manufacturing approaches and their impact on photonics device performance (signal loss) for a common set of device structures. We will also explore the standard metrics applied to photomask quality and determine whether they correlate to waveguide performance, or whether different metrology approaches are required for vetting photonics-centric photomasks.
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