Failure And Yield Analysis Techniques For Readout Devices Tested In A High Throughput Automated Wafer Probing Environment

Noel D. Jolivet; Lee D. Holoien

doi:10.1117/12.978598

8 January 1990 Failure And Yield Analysis Techniques For Readout Devices Tested In A High Throughput Automated Wafer Probing Environment

Noel D. Jolivet, Lee D. Holoien

Author Affiliations +

Proceedings Volume 1157, Infrared Technology XV; (1990) https://doi.org/10.1117/12.978598
Event: 33rd Annual Technical Symposium, 1989, San Diego, United States

Abstract

Failure and yield analysis capabilities were developed for focal plane array (FPA) readout devices probe tested at wafer level instead of merely performing production rate testing and cataloging data. Innovative test strategies have been combined with software techniques to provide tools which accomplish these analyses while maintaining high throughput in test. This approach has been beneficial and valuable in saving test time when searching for hardware faults, investigating design susceptibilities, revealing foundry process variations from wafer to wafer and/or lot to lot, and creating a yield model for the parts tested. Testing of readout devices has historically been viewed as a major obstacle in high volume production of reliable components for focal plane systems. Thorough testing in a high throughput automated wafer probe environment may be achieved, but often at the expense of real-time analysis of failures and yield factors. Production testing has been established with these goals in mind rather than as an afterthought. This enables one to identify failure mechanisms as they occur in order to reduce yield loss and unnecessary test time. In addition to performing requisite data base management, routines have been created to re-sort data and reevaluate yield through varying performance parameter limits, to track and map failure mechanisms as they are encountered, to examine acquired data as a function of limits, and to provide yield information for feedback response to foundry processing. Ideas for aiding operators in recognizing and diagnosing possible test set hardware problems (as opposed to on-chip failures) have also been implemented.

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Noel D. Jolivet and Lee D. Holoien "Failure And Yield Analysis Techniques For Readout Devices Tested In A High Throughput Automated Wafer Probing Environment", Proc. SPIE 1157, Infrared Technology XV, (8 January 1990); https://doi.org/10.1117/12.978598

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