Optimization of the EUV contact layer process for 7nm FPGA production

Qi Lin; Toshiyuki Hisamura; Nui Chong; Jonathan Chang

doi:10.1117/12.2584288

22 February 2021 Optimization of the EUV contact layer process for 7nm FPGA production

Qi Lin, Toshiyuki Hisamura, Nui Chong, Jonathan Chang

Proceedings Volume 11609, Extreme Ultraviolet (EUV) Lithography XII; 116090V (2021) https://doi.org/10.1117/12.2584288
Event: SPIE Advanced Lithography, 2021, Online Only

Abstract

After years of effort, extreme ultraviolet (EUV) lithography is finally in production for 7nm technology node and beyond. The 7nm node is the first generation where EUV has been employed to replace a few critical multi-patterning immersion layers in the product. While EUV lithography has helped to overcome some challenges in multi-patterning immersion lithography in advanced nodes such as process complexity and pattern uniformity, it has also brought about new challenges. In this paper, we choose the EUV contact layer as an example to describe how to insert EUV in a 7nm FPGA product to simplify the process and improve product performance. We select the EUV contact layer because it can improve the transistor performance by lowering the contact resistance with EUV’s reduced Edge Placement Error. We demonstrate how to tackle EUV contact defectivity, variability, and integration from a production point of view through the FPGA embedded memory CRAM. CRAM failure signatures and behaviors can be used to debug the contact related defects and monitor the contact resistance variation in the product. Combined with physical-failure-analysis (PFA) results on failed EUV contacts and CRAM characterization data, foundry can fine tune the EUV contact process to reduce contact defects and contact resistance variation. After a few iterations, our product achieves a stable and low-resistance EUV contact process with a significant reduction in contact failure rate.

Conference Presentation

Citation Download Citation

Qi Lin, Toshiyuki Hisamura, Nui Chong, and Jonathan Chang "Optimization of the EUV contact layer process for 7nm FPGA production", Proc. SPIE 11609, Extreme Ultraviolet (EUV) Lithography XII, 116090V (22 February 2021); https://doi.org/10.1117/12.2584288

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