An FPGA partial reconfiguration method for satellite cryptographic device verification

Jianeng Li; Ningning Song; Xuguang Jia; Long Wang

doi:10.1117/12.2679163

12 May 2023 An FPGA partial reconfiguration method for satellite cryptographic device verification

Jianeng Li, Ningning Song, Xuguang Jia, Long Wang

Proceedings Volume 12641, International Conference on Cryptography, Network Security, and Communication Technology (CNSCT 2023); 1264108 (2023) https://doi.org/10.1117/12.2679163
Event: International Conference on Cryptography, Network Security, and Communication Technology (CNSCT 2023), 2023, Changsha, China

Abstract

As a core hardware in the development of satellite cryptographic devices, FPGAs are required to go through extensive functional correctness validation before finally bound to the channel equipment. However, the diversity of satellite communication systems and the bad habits of some developers often lead to the ineffective reuse of verification module. To improve the reuse rate of verification module and the verification efficiency of cryptographic devices, we propose an FPGA partial reconfiguration method based on minimum functional unit division (MFD). First, we present a formal description of the minimum functional unit (MFU), which is a collection of modules that are highly cohesive and atomized with respect to the system's entire functional design. Then a reconfiguration method based on MFU global search is given as an implementation of MFD. Next, the performance of MFD is analyzed in terms of reconfiguration granularity, implementation complexity, extensibility and module reuse rate, and the analysis results show a good performance in optimizing FPGA partial reconfiguration design. Finally, we design a MFD based satellite cryptographic device verification platform, in which the hardware interface, communication protocol, cryptographic algorithm and other functional modules are selected as MFU to complete the partial reconfiguration design. The design of the platform based on MFD shows the practicability of MFD, which can provide theoretical guidance for further applying FPGA partial reconfiguration technology in satellite cryptographic device verification platform.

Citation Download Citation

Jianeng Li, Ningning Song, Xuguang Jia, and Long Wang "An FPGA partial reconfiguration method for satellite cryptographic device verification", Proc. SPIE 12641, International Conference on Cryptography, Network Security, and Communication Technology (CNSCT 2023), 1264108 (12 May 2023); https://doi.org/10.1117/12.2679163

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KEYWORDS

Field programmable gate arrays

Design and modelling

Satellites

Telecommunications

Logic

Satellite communications

Data communications

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