Paper
1 June 1991 MIMD (multiple instruction multiple data) multiprocessor system for real-time image processing
Peter Pirsch, Hartwig Jeschke
Author Affiliations +
Proceedings Volume 1452, Image Processing Algorithms and Techniques II; (1991) https://doi.org/10.1117/12.45413
Event: Electronic Imaging '91, 1991, San Jose, CA, United States
Abstract
Anovel MIMD (Multiple Instruction Multiple Data) based architecture consisting of multiple processing elements (PE) has been developed. This architecture is adapted to real-time processing of sequences of different tasks for local image segments. Each PE contains an arithmetic processing unit (APU), adapted to parallel processing of low level operations, and a high level and control processor (HLCP) for medium and high level operations and control of the PE. This HLCP can be a standard signal processor or a RISC processor. Because of the local control of each PE by the HLCP and a SIMD structure of the APU, the overall system architecture is characterized as MIMD based with a local SIMD structure for low level processing. Due to an overlapped computation and communication the multiprocessor system achieves a linear speedup compared to a single processing element. Main parts of the PE have been realized as two ASICs in a 1.5 jim CMOS-Process. With a system clock rate of 25MHz, each PE provides a peak performance of 400 Mega operations per second (MOPS).
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Peter Pirsch and Hartwig Jeschke "MIMD (multiple instruction multiple data) multiprocessor system for real-time image processing", Proc. SPIE 1452, Image Processing Algorithms and Techniques II, (1 June 1991); https://doi.org/10.1117/12.45413
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Cited by 5 scholarly publications.
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KEYWORDS
Image processing

Video

Image segmentation

Signal processing

Video processing

Clocks

Real time image processing

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