Paper
4 November 1993 Bit synchronization in multigigabit receivers
J. Nuno Matos, Atilio M. S. Gameiro, Paulo M.P. Monteiro, Jose Ferreira da Rocha
Author Affiliations +
Proceedings Volume 1974, Transport Technologies for Broadband Optical Access Networks; (1993) https://doi.org/10.1117/12.161502
Event: Video Communications and Fiber Optic Networks, 1993, Berlin, Germany
Abstract
In this paper we report the design and implementation of bit synchronizers for multigigabit transmission systems. We present the main features of dielectric resonators (DRs) and considerations to take into account when using them as filters for clock recovery circuits. We address the problem of using balanced and unbalanced nonlinear circuits (NLs) for which we perform a theoretical analysis of the full-wave and truncated squarer non-linearities. Finally we describe the design of a prototype for a 10 Gbit/s system and report measurements obtained with it.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. Nuno Matos, Atilio M. S. Gameiro, Paulo M.P. Monteiro, and Jose Ferreira da Rocha "Bit synchronization in multigigabit receivers", Proc. SPIE 1974, Transport Technologies for Broadband Optical Access Networks, (4 November 1993); https://doi.org/10.1117/12.161502
Lens.org Logo
CITATIONS
Cited by 3 scholarly publications.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Clocks

Amplifiers

Field effect transistors

Filtering (signal processing)

Gallium arsenide

Nonlinear filtering

Prototyping

Back to Top