Practical application of a wafer-level reliability control program

Jeff S. May; Javier Saenz; Hoang Huy Hoang

doi:10.1117/12.186766

14 September 1994 Practical application of a wafer-level reliability control program

Jeff S. May, Javier Saenz, Hoang Huy Hoang

Proceedings Volume 2334, Microelectronics Manufacturability, Yield, and Reliability; (1994) https://doi.org/10.1117/12.186766
Event: Microelectronic Manufacturing, 1994, Austin, TX, United States

Abstract

Wafer level reliability (WLR) was envisioned as an upstream tool to be applied within the wafer fab process to avoid or detect reliability problems before they can reach the fmished product. To demonstrate a practical application of this approach, the development, execution and results of a WLR qualification and production control plan for an advanced, sub-micron, triple-level metal CMOS process is provided. The WLR qualification evaluated the following reliability concerns: oxygen precipitation, contact integrity, hot carrier reliability, mobile ion contamination, dielectric integrity, electromigration, stress voiding, via integrity, and corrosion susceptibility. The production control plan describes a statistical process control (SPC) program which monitors input process parameters and electrical parameters measured prior to fmal test that are used to disposition lots. Keywords: wafer level reliability, building-in reliability, designing-in reliability, process control, qualification.

Citation Download Citation

Jeff S. May, Javier Saenz, and Hoang Huy Hoang "Practical application of a wafer-level reliability control program", Proc. SPIE 2334, Microelectronics Manufacturability, Yield, and Reliability, (14 September 1994); https://doi.org/10.1117/12.186766

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