Processor arrays with asynchronous TDM optical buses

Y. Li; S. Q. Zheng

doi:10.1117/12.271100

4 April 1997 Processor arrays with asynchronous TDM optical buses

Y. Li, S. Q. Zheng

Proceedings Volume 3005, Optoelectronic Interconnects and Packaging IV; (1997) https://doi.org/10.1117/12.271100
Event: Photonics West '97, 1997, San Jose, CA, United States

Abstract

We propose a pipelined asynchronous time division multiplexing optical bus. Such a bus can use one of the two hardwared priority schemes, the linear priority scheme and the round-robin priority scheme. Our simulation results show that the performances of our proposed buses are significantly better than the performances of known pipelined synchronous time division multiplexing optical buses. We also propose a class of processor arrays connected by pipelined asynchronous time division multiplexing optical buses. We claim that our proposed processor array not only have better performance, but also have better scalabilities than the existing processor arrays connected by pipelined synchronous time division multiplexing optical buses.

Citation Download Citation

Y. Li and S. Q. Zheng "Processor arrays with asynchronous TDM optical buses", Proc. SPIE 3005, Optoelectronic Interconnects and Packaging IV, (4 April 1997); https://doi.org/10.1117/12.271100

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