VLSI-distributed architectures for smart cameras

Wayne H. Wolf

doi:10.1117/12.420799

29 March 2001 VLSI-distributed architectures for smart cameras

Wayne H. Wolf

Proceedings Volume 4313, Media Processors 2001; (2001) https://doi.org/10.1117/12.420799
Event: Photonics West 2001 - Electronic Imaging, 2001, San Jose, CA, United States

Abstract

Smart cameras use video/image processing algorithms to capture images as objects, not as pixels. This paper describes architectures for smart cameras that take advantage of VLSI to improve the capabilities and performance of smart camera systems. Advances in VLSI technology aid in the development of smart cameras in two ways. First, VLSI allows us to integrate large amounts of processing power and memory along with image sensors. CMOS sensors are rapidly improving in performance, allowing us to integrate sensors, logic, and memory on the same chip. As we become able to build chips with hundreds of millions of transistors, we will be able to include powerful multiprocessors on the same chip as the image sensors. We call these image sensor/multiprocessor systems image processors. Second, VLSI allows us to put a large number of these powerful sensor/processor systems on a single scene. VLSI factories will produce large quantities of these image processors, making it cost-effective to use a large number of them in a single location. Image processors will be networked into distributed cameras that use many sensors as well as the full computational resources of all the available multiprocessors. Multiple cameras make a number of image recognition tasks easier: we can select the best view of an object, eliminate occlusions, and use 3D information to improve the accuracy of object recognition. This paper outlines approaches to distributed camera design: architectures for image processors and distributed cameras; algorithms to run on distributed smart cameras, and applications of which VLSI distributed camera systems.

Citation Download Citation

Wayne H. Wolf "VLSI-distributed architectures for smart cameras", Proc. SPIE 4313, Media Processors 2001, (29 March 2001); https://doi.org/10.1117/12.420799

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