Paper
19 November 2001 Novel wafer-through technique for interconnects
Vladimir Gueorguiev Kutchoukov, Jeff R. Mollinger, Andre Bossche
Author Affiliations +
Proceedings Volume 4593, Design, Characterization, and Packaging for MEMS and Microelectronics II; (2001) https://doi.org/10.1117/12.448858
Event: International Symposium on Microelectronics and MEMS, 2001, Adelaide, Australia
Abstract
This paper presents a novel method for wafer-through interconnects via anisotropically etched groove in a (100)-silicon wafer. The idea is based on realization of interconnection lines on the inclined sidewalls of the anisotropically etched grooves, which are transferring the metallization to the backside of the wafer. The process itself is compatible with the standard semiconductor technology and can be applied at full wafer level, achieving in this way low packaging costs. All processes for interconnects are applied from the backside of the wafer at the packaging step, thus preserving the frontside of the wafer during processing from scratches and pollution. The key issue in the presented method is the photoresist coating of anisotropically etched grooves, which can be done by standard or electrodeposited photoresist. Further, methods to improve the photoresist uniformity over three-dimensional structures are discussed. Copper interconnects have been realized to show the feasibility of this wafer-through technique for frontside to backside electrical interconnections. Copper has been used for the metallization instead of aluminum. The thickness of the copper interconnects have been increased by copper electroplating to reduce further their electrical resistance and to increase their mechanical strength.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Vladimir Gueorguiev Kutchoukov, Jeff R. Mollinger, and Andre Bossche "Novel wafer-through technique for interconnects", Proc. SPIE 4593, Design, Characterization, and Packaging for MEMS and Microelectronics II, (19 November 2001); https://doi.org/10.1117/12.448858
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KEYWORDS
Semiconducting wafers

Photoresist materials

Copper

Coating

Silicon

Electrochemical etching

Packaging

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