3.5-Gb/s 0.35-um CMOS data decision IC

Zheng Gu; Zhigong Wang; Huan Wang; Rui Tao; Tingting Xie; Shizhong Xie; Yi Dong

doi:10.1117/12.444577

16 October 2001 3.5-Gb/s 0.35-μm CMOS data decision IC

Zheng Gu, Zhigong Wang, Huan Wang, Rui Tao, Tingting Xie, Shizhong Xie, Yi Dong

Proceedings Volume 4603, Fiber Optics and Optoelectronics for Network Applications; (2001) https://doi.org/10.1117/12.444577
Event: International Symposium on Optoelectonics and Microelectronics, 2001, Nanjing, China

Abstract

A data decision IC is designed for STM-16 SDH-systems. A differential high-speed master-slave DFF is used for the decision function. Wide-band high-gain amplifiers are used for input and output data buffers to obtain high sensitivity and sufficient drive capability. The chip was realized in a 0.35-μm CMOS foundry technology. The chip size is 0.7x0.8mm².The supply voltage is 5 V and the current is 50mA. A working data rate of higher than 3.5Gb/s has been measured. The sensitivity is as low as 10~20mV.

Citation Download Citation

Zheng Gu, Zhigong Wang, Huan Wang, Rui Tao, Tingting Xie, Shizhong Xie, and Yi Dong "3.5-Gb/s 0.35-μm CMOS data decision IC", Proc. SPIE 4603, Fiber Optics and Optoelectronics for Network Applications, (16 October 2001); https://doi.org/10.1117/12.444577

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