Paper
15 January 2003 Fabrication of microchannels for compliant wafer level packaging using sacrificial materials
Hollie A. Reed, Joseph Paul Jayachandran, Robert A. Shick, Larry F. Rhodes, Jeffery Krotine, Ed Elce, Sue Ann Allen, Paul A. Kohl
Author Affiliations +
Proceedings Volume 4979, Micromachining and Microfabrication Process Technology VIII; (2003) https://doi.org/10.1117/12.479568
Event: Micromachining and Microfabrication, 2003, San Jose, CA, United States
Abstract
Electronic packaging and chip-to-module connections have evolved to meet the needs of electronic systems. The rate of change of the technology will accelerate as the package disappears and optical interconnects come into play. Compliant wafer-scale packaging is an approach which can be used to provide acceptable electrical and mechanical functions for future electronic packaging. In this work, buried air-cavities using sacrificial polymers are used to provide compressible input/output leads.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hollie A. Reed, Joseph Paul Jayachandran, Robert A. Shick, Larry F. Rhodes, Jeffery Krotine, Ed Elce, Sue Ann Allen, and Paul A. Kohl "Fabrication of microchannels for compliant wafer level packaging using sacrificial materials", Proc. SPIE 4979, Micromachining and Microfabrication Process Technology VIII, (15 January 2003); https://doi.org/10.1117/12.479568
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Cited by 1 scholarly publication and 2 patents.
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KEYWORDS
Lead

Polymers

Packaging

Semiconducting wafers

Gold

Copper

Optical interconnects

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