Paper
16 May 2003 Comparative analysis of advanced poly-silicon thin-film transistor architectures for drain field relief
Guglielmo Fortunato, Antonio Valletta, Alessandra Bonfiglietti, Massimo Cuscuna, Paolo Gaucci, Luigi Mariucci, Alessandro Pecora, Stan D. Brotherton, J. Richard Ayres
Author Affiliations +
Abstract
Two different drain field relief architectures, lightly doped drain (LDD) and gate overlapped LDD (GOLDD), for polysilicon TFT have been analyzed and compared to conventional self-aligned (SA) devices. The introduction of LDD regions improves off-current, kink effect and electrical stability if compared to SA devices. However, a parasitic resistance effect is also introduced, thus limiting the benefits of LDD structures. GOLDD architecture overcomes this drawback, but, more importantly, show improved off-current and kink effect and exceptionally high electrical stability. The experimental results have been explained by analyzing the electric field distributions, obtained by two-dimensional numerical simulations, while a new tool to explain hot-carrier induced modifications in polysilicon TFTs was developed.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Guglielmo Fortunato, Antonio Valletta, Alessandra Bonfiglietti, Massimo Cuscuna, Paolo Gaucci, Luigi Mariucci, Alessandro Pecora, Stan D. Brotherton, and J. Richard Ayres "Comparative analysis of advanced poly-silicon thin-film transistor architectures for drain field relief", Proc. SPIE 5004, Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technology Areas, (16 May 2003); https://doi.org/10.1117/12.473883
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Cited by 2 scholarly publications.
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KEYWORDS
Thin films

Transistors

Electronic imaging

Numerical simulations

Resistance

Technologies and applications

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