Design-to-process integration: optimizing 130-nm X architecture manufacturing

Robert Dean; Vinod K. Malhotra; Nahid King; Michael Sanie; Susan S. MacDonald; James D. Jordan; Shigeru Hirukawa

doi:10.1117/12.485258

10 July 2003 Design-to-process integration: optimizing 130-nm X architecture manufacturing

Robert Dean, Vinod K. Malhotra, Nahid King, Michael Sanie, Susan S. MacDonald, James D. Jordan, Shigeru Hirukawa

Proceedings Volume 5042, Design and Process Integration for Microelectronic Manufacturing; (2003) https://doi.org/10.1117/12.485258
Event: Advanced Microelectronic Manufacturing, 2003, Santa Clara, CA, United States

Abstract

The X Architecture is a novel on-chip interconnect architecture based on the pervasive use of diagonal wiring. This diagonal wiring reduces total chip wire length by an average 20% and via count by an average of 30%, resulting in simultaneous improvements in chip speed, power, a cost. Thirty percent or greater reduction in via counts is a compelling feature for IC design - but can chips with massive amounts of diagonal wiring be manufactured without some other penalty? This paper presents the result of a project, collaborated by Cadence Design Systems, Numerical Technologies, DuPont Photomasks, and Nikon, aimed at optimizing each step of the lithography supply chain for the Architecture from masks to wafers at 130 nm.

Citation Download Citation

Robert Dean, Vinod K. Malhotra, Nahid King, Michael Sanie, Susan S. MacDonald, James D. Jordan, and Shigeru Hirukawa "Design-to-process integration: optimizing 130-nm X architecture manufacturing", Proc. SPIE 5042, Design and Process Integration for Microelectronic Manufacturing, (10 July 2003); https://doi.org/10.1117/12.485258

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