Paper
30 March 2004 A new small-swing domino logic for low-power consumption
Sung-Hyun Yang, Kyoung-Rok Cho
Author Affiliations +
Proceedings Volume 5274, Microelectronics: Design, Technology, and Packaging; (2004) https://doi.org/10.1117/12.544524
Event: Microelectronics, MEMS, and Nanotechnology, 2003, Perth, Australia
Abstract
In this paper, we propose new small swing domino logic for low-power consumption. To reduce the power consumption, both the precharge node and the output node swing the range from 0 to VREF-VTHN, where VREF=VDD-nVTHN. This can be done by the inverter structure that allows a full swing or a small swing on its input terminal without leakage current. Compared to the small swing domino circuit of the previous works, the proposed structure can save the power consumption of more than 30% for n=1, 2, and 3 in the equation of VREF=VDD-nVTHN.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sung-Hyun Yang and Kyoung-Rok Cho "A new small-swing domino logic for low-power consumption", Proc. SPIE 5274, Microelectronics: Design, Technology, and Packaging, (30 March 2004); https://doi.org/10.1117/12.544524
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KEYWORDS
Logic

Capacitance

Clocks

Transistors

CMOS technology

Capacitors

Photography

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