Paper
15 July 2004 Design and implementation of a real-time image noise canceller
Author Affiliations +
Abstract
Image noise cancellation is necessary to remove noise generated in communication systems or remote video conferencing systems. Processing speed has become a challenge as a consequence of the increasing image resolution, especially in visual information processing. This paper presents the design and implementation of a real-time image noise canceller. Two-dimensional least mean square (TDLMS) algorithm is employed as the adaptive filter for noise cancellation. This algorithm is modified and designed with two concurrent phases: filter coefficient adjustment phase and image noise cancellation phase, with each phase mapping into a pipeline structure, therefore achieving real-time performance. The image noise canceller is implemented using hardware description language VHDL and is prototyped on Field Programmable Gate Array (FPGA) for system reconfiguration. A data buffer is developed using SelectRAM (BRAM) embedded in a Virtex FPGA to overcome the bandwidth limitation between external memory and the noise cancellation processor. The FPGA embedded multipliers are also employed to improve the processing speed. Tested using standard images, this real-time image noise canceller could process up to 1528 frames of 256 by 256 pixel images per second and could reach up to 10.4dB signal to noise ration improvement.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jing Ma and Xinming Huang "Design and implementation of a real-time image noise canceller", Proc. SPIE 5438, Visual Information Processing XIII, (15 July 2004); https://doi.org/10.1117/12.546400
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KEYWORDS
Image processing

Field programmable gate arrays

Signal to noise ratio

Image filtering

Digital filtering

Signal processing

Filtering (signal processing)

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