Design of CMOS-APS circuits with image preprocessing

Evgeniya N. Serova

doi:10.1117/12.675672

18 April 2006 Design of CMOS-APS circuits with image preprocessing

Evgeniya N. Serova

Proceedings Volume 6180, Photonics, Devices, and Systems III; 61800S (2006) https://doi.org/10.1117/12.675672
Event: Photonics, Devices, and Systems III, 2005, Prague, Czech Republic

Abstract

This paper is devoted to creation of novel CMOS APS imagers with focal plane parallel image preprocessing. The general principle of analog subtraction is described. The important research direction devoted to analogue implementation of main preprocessing operations (addition, subtraction, neighbored frame subtraction, module, and edge detection of pixel signals) in focal plane of CMOS APS imagers. The following results are presented: the algorithm of edge detection for analog realization, and patented focal plane circuits for analog image reprocessing (signals subtraction, additional, edge detection).

Citation Download Citation

Evgeniya N. Serova "Design of CMOS-APS circuits with image preprocessing", Proc. SPIE 6180, Photonics, Devices, and Systems III, 61800S (18 April 2006); https://doi.org/10.1117/12.675672

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