A real-time bit-serial rank filter implementation using Xilinx FPGA

Chang Choo; Punam Verma

doi:10.1117/12.765789

26 February 2008 A real-time bit-serial rank filter implementation using Xilinx FPGA

Chang Choo, Punam Verma

Proceedings Volume 6811, Real-Time Image Processing 2008; 68110F (2008) https://doi.org/10.1117/12.765789
Event: Electronic Imaging, 2008, San Jose, California, United States

Abstract

Rank filter is a non-linear filter used in image processing for impulse noise removal, morphological operations, and image enhancement. Real-time applications, such as video and high-speed acquisition cameras, often require the rank filter, and the much simpler median filter. Implementing the rank filter in hardware, can achieve the required speeds for these applications. Bit-serial algorithm can increase the speed of rank filter by eliminating the time-consuming sorting network. In this paper, an 8-stage pipelined architecture for rank filter is described using the bit-serial algorithm. It also includes an efficient window extraction and boundary-processing scheme. This rank filter design was simulated and synthesized on the Xilinx family of FPGAs. For 3×3 window size, the maximum operating frequency achieved was 75 MHz on a low-end device XC3S200 of Spartan-3 family, and 180 MHz on a high-end device XC4VSX25 of Virtex-4 family. For 5×5 window size, the maximum operating frequency achieved was 67 MHz on XC3S200, and 138 MHz on XC4VSX25. With a pixel filtered out at every clock cycle, the achieved speeds are sufficient for most of the video applications. The 3×3 window size design used 31% of slices on XC3S200, and 5% on XC4VSX25. The 5×5 window size design used 60% of slices on XC3S200, and 11% on XC4VSX25. This IP design may be used as a hardware accelerator in a fast image processing SOC.

Citation Download Citation

Chang Choo and Punam Verma "A real-time bit-serial rank filter implementation using Xilinx FPGA", Proc. SPIE 6811, Real-Time Image Processing 2008, 68110F (26 February 2008); https://doi.org/10.1117/12.765789

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available