Paper
12 October 2011 3D-processor arrays accelerators for high-performance computing in remote sensing applications
A. Castillo Atoche, J. Vazquez Castillo, L. Rizo Dominguez, J. Sandoval Gio
Author Affiliations +
Proceedings Volume 8183, High-Performance Computing in Remote Sensing; 818303 (2011) https://doi.org/10.1117/12.898476
Event: SPIE Remote Sensing, 2011, Prague, Czech Republic
Abstract
The conceptualization and employment of efficient 3D processor arrays (3D-PAs) accelerator units in aggregation with the HW/SW co-design technique is developed in this study in a FPGA platform, for the real-time enhancement/reconstruction of large-scale remote sensing (RS) imaging for Geospatial applications. The addressed architecture implements the previously proposed robust fused Bayesian-regularization (RFBR) enhanced radar imaging method for the solution of ill-conditioned inverse spatial spectrum pattern (SSP) estimation problems. Finally, we show how the proposed 3D-PAs accelerators drastically reduce the computational load of the real-world Geospatial imagery tasks suitable for the real-time implementation.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
A. Castillo Atoche, J. Vazquez Castillo, L. Rizo Dominguez, and J. Sandoval Gio "3D-processor arrays accelerators for high-performance computing in remote sensing applications", Proc. SPIE 8183, High-Performance Computing in Remote Sensing, 818303 (12 October 2011); https://doi.org/10.1117/12.898476
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KEYWORDS
Remote sensing

Field programmable gate arrays

Image enhancement

Protactinium

Array processing

Computer architecture

Data modeling

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