An FPGA design of generalized low-density parity-check codes for rate-adaptive optical transport networks

Ding Zou; Ivan B. Djordjevic

doi:10.1117/12.2214473

13 February 2016 An FPGA design of generalized low-density parity-check codes for rate-adaptive optical transport networks

Ding Zou, Ivan B. Djordjevic

Author Affiliations +

Proceedings Volume 9773, Optical Metro Networks and Short-Haul Systems VIII; 97730M (2016) https://doi.org/10.1117/12.2214473
Event: SPIE OPTO, 2016, San Francisco, California, United States

Abstract

Forward error correction (FEC) is as one of the key technologies enabling the next-generation high-speed fiber optical communications. In this paper, we propose a rate-adaptive scheme using a class of generalized low-density parity-check (GLDPC) codes with a Hamming code as local code. We show that with the proposed unified GLDPC decoder architecture, a variable net coding gains (NCGs) can be achieved with no error floor at BER down to 10^-15, making it a viable solution in the next-generation high-speed fiber optical communications.

Citation Download Citation

Ding Zou and Ivan B. Djordjevic "An FPGA design of generalized low-density parity-check codes for rate-adaptive optical transport networks", Proc. SPIE 9773, Optical Metro Networks and Short-Haul Systems VIII, 97730M (13 February 2016); https://doi.org/10.1117/12.2214473

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