Pattern transfer processes for 157-nm lithography

Seiro Miyoshi; Takamitsu Furukawa; Hiroyuki Watanabe; Shigeo Irie; Toshiro Itani

doi:10.1117/1.1507336

1 October 2002 Pattern transfer processes for 157-nm lithography

Seiro Miyoshi, Takamitsu Furukawa, Hiroyuki Watanabe, Shigeo Irie, Toshiro Itani

Author Affiliations +

Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 1, Issue 3, (October 2002). https://doi.org/10.1117/1.1507336

Abstract

We describe and evaluate three kinds of pattern transfer processes that are suitable for 157-nm lithography. These transfer processes are (1) a hard mask (HM) process using SiO as a HM material, (2) a HM process using an organic bottom anti-reflecting coating/SiN structure, and (3) a bi-layer process using a silicon-containing resist and an organic film as the bottom layer. In all of these processes, the underlayer of the resist acts as an anti-reflecting layer. For the HM processes, we patterned a newly developed fluorine-containing resist using a 157-nm microstepper, and transferred the resist patterns to the hard mask by reactive ion etching (RIE) with minimal critical dimension shift. Using the HM pattern, we then fabricated a 65 nm WSi/poly-Si gate pattern using a high-numerical aperture (NA) microstepper (NA = 0.85). With the bi-layer process, we transferred a 60 nm 1:1 lines and spaces pattern of a newly developed silicon-containing resist to a 300-nm-thick organic film by RIE. The fabrication of a 65 nm 1:1 gate pattern and 60 nm 1:1 organic film pattern clearly demonstrated that 157-nm lithography is the best candidate for fabricating sub-70 nm node devices.

©(2002) Society of Photo-Optical Instrumentation Engineers (SPIE)

Citation Download Citation

Seiro Miyoshi, Takamitsu Furukawa, Hiroyuki Watanabe, Shigeo Irie, and Toshiro Itani "Pattern transfer processes for 157-nm lithography," Journal of Micro/Nanolithography, MEMS, and MOEMS 1(3), (1 October 2002). https://doi.org/10.1117/1.1507336

Published: 1 October 2002

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