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Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. Characterization was performed for a number of prototype sensors with different device architectures, e.g. location of the internal gate, MOSFET polysilicon gate structure, and location of the trough in the internal gate with respect to the source and drain of the MOSFET (the trough is introduced to confine the charge in the internal gate). Using a buried-channel SiSeRO, we have achieved a charge/current conversion gain of >700 pA per electron, an equivalent noise charge (ENC) of around 6 electrons root mean square (RMS), and a full width half maximum (FWHM) of approximately 140 eV at 5.9 keV at a readout speed of 625 Kpixel/s. In this paper, we discuss the SiSeRO working principle, the readout module developed at Stanford, and the characterization test results of the SiSeRO prototypes. We also discuss the potential to implement Repetitive Non-Destructive Readout (RNDR) with these devices and the preliminary results which can in principle yield sub-electron ENC performance. Additional measurements and detailed device simulations will be essential to mature the SiSeRO technology. However, this new device class presents an exciting technology for next generation astronomical X-ray telescopes requiring fast, low-noise, radiation hard megapixel imagers with moderate spectroscopic resolution.
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