Paper
1 December 1991 640 x 480 MOS PtSi IR sensor
Donald J. Sauer, Frank V. Shallcross, Fu-Lung Hseuh, Grazyna M. Meray, Peter A. Levine, Harvey R. Gilmartin, Thomas S. Villani, Benjamin J. Esposito, John R. Tower
Author Affiliations +
Abstract
The design of a 1st and 2nd generation 640(H) X 480(V) element PtSi Schottky-barrier infrared image sensor employing a low-noise MOS X-Y addressable readout multiplexer and on-chip low-noise output amplifier is described. Measured performance characteristics for Gen 1 devices are presented along with calculated performance for the Gen 2 design. A multiplexed horizontal/vertical input address port and on-chip decoding is used to load scan data into CMOS horizontal and vertical scanning registers. This allows random access to any sub-frame in the 640 X 480 element focal plane array. By changing the digital pattern applied to the vertical scan register, the FPA can be operated in either an interlaced or non- interlaced format, and the integration time may be varied over a wide range (60 microsecond(s) to > 30 ms, for RS170 operation) resulting in a form of 'electronic shutter,' or variable exposure control. The pixel size of 24-micrometers X 24-micrometers results in a fill factor of 38% for 1.5-micrometers process design rules. The overall die size for the IR imager is 13.7 mm X 17.2 mm. All digital inputs to the chip are TTL compatible and include ESD protection.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Donald J. Sauer, Frank V. Shallcross, Fu-Lung Hseuh, Grazyna M. Meray, Peter A. Levine, Harvey R. Gilmartin, Thomas S. Villani, Benjamin J. Esposito, and John R. Tower "640 x 480 MOS PtSi IR sensor", Proc. SPIE 1540, Infrared Technology XVII, (1 December 1991); https://doi.org/10.1117/12.48745
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CITATIONS
Cited by 3 scholarly publications and 1 patent.
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KEYWORDS
Imaging systems

Molybdenum

Sensors

Multiplexers

Electrons

Infrared sensors

Transistors

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