Floating-point arithmetic in embedded and reconfigurable computing systems

Syed Gilani; Michael Schulte; Katherine Compton; Neil Hockert

doi:10.1117/12.828388

3 September 2009 Floating-point arithmetic in embedded and reconfigurable computing systems

Syed Gilani, Michael Schulte, Katherine Compton, Neil Hockert

Proceedings Volume 7444, Mathematics for Signal and Information Processing; 74440M (2009) https://doi.org/10.1117/12.828388
Event: SPIE Optical Engineering + Applications, 2009, San Diego, California, United States

Abstract

Modern embedded and reconfigurable systems need to support a wide range of applications, many of which may significantly benefit from hardware support for floating-point arithmetic. Some of these applications include 3D graphics, multiple-input multiple-output (MIMO) wireless communication algorithms, orthogonal frequency division multiplexing (OFDM) based systems, and digital filters. Many of these applications have real-time constraints that cannot tolerate the high latency of software emulated floating-point arithmetic. Moreover, software emulation can lead to higher energy consumption that may be unsuitable for applications in powerconstrained environments. This paper examines applications that can potentially benefit from hardware support for floating-point arithmetic and discusses some approaches taken for floating-point arithmetic in embedded and reconfigurable systems. Precision and range analysis is performed on emerging applications in the MIMO wireless communications domain to investigate the potential for low power floating-point units that utilize reduced precision and exponent range.

Citation Download Citation

Syed Gilani, Michael Schulte, Katherine Compton, and Neil Hockert "Floating-point arithmetic in embedded and reconfigurable computing systems", Proc. SPIE 7444, Mathematics for Signal and Information Processing, 74440M (3 September 2009); https://doi.org/10.1117/12.828388

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