KEYWORDS: Matrices, Digital filtering, Optical spheres, Embedded systems, Digital signal processing, Telecommunications, Wireless communications, Filtering (signal processing), Signal to noise ratio, Computing systems
Modern embedded and reconfigurable systems need to support a wide range of applications, many of which may
significantly benefit from hardware support for floating-point arithmetic. Some of these applications include
3D graphics, multiple-input multiple-output (MIMO) wireless communication algorithms, orthogonal frequency
division multiplexing (OFDM) based systems, and digital filters. Many of these applications have real-time
constraints that cannot tolerate the high latency of software emulated floating-point arithmetic. Moreover,
software emulation can lead to higher energy consumption that may be unsuitable for applications in powerconstrained
environments. This paper examines applications that can potentially benefit from hardware support
for floating-point arithmetic and discusses some approaches taken for floating-point arithmetic in embedded
and reconfigurable systems. Precision and range analysis is performed on emerging applications in the MIMO
wireless communications domain to investigate the potential for low power floating-point units that utilize reduced
precision and exponent range.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.